diff --git a/Android.mk b/Android.mk index 7a61fcf..63791d7 100644 --- a/Android.mk +++ b/Android.mk @@ -38,7 +38,7 @@ LOCAL_SRC_FILES := \ src/x86/intel_minnow_byt_compatible.c \ src/x86/intel_cherryhills.c \ src/x86/up.c \ - src/x86/intel_gt_tuchuck.c + src/x86/intel_joule_expansion.c # glob.c pulled in from NetBSD project (BSD 3-clause License) LOCAL_SRC_FILES += \ diff --git a/README.md b/README.md index 67e084e..d8ccd77 100644 --- a/README.md +++ b/README.md @@ -29,7 +29,7 @@ X86 * [Minnowboard Max](../master/docs/minnow_max.md) * [NUC 5th generation](../master/docs/intel_nuc5.md) * [UP](../master/docs/up.md) -* [Intel Joule](../master/docs/grossetete.md) +* [Intel Joule](../master/docs/joule.md) ARM --- diff --git a/api/mraa/types.h b/api/mraa/types.h index edfdd48..ca77513 100644 --- a/api/mraa/types.h +++ b/api/mraa/types.h @@ -50,7 +50,8 @@ typedef enum { MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ MRAA_INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */ MRAA_UP = 12, /**< The UP Board */ - MRAA_INTEL_GT_TUCHUCK = 13, /**< The Intel GT Tuchuck Board */ + MRAA_INTEL_JOULE_EXPANSION = 13, /**< The Intel Joule Expansion Board */ + MRAA_INTEL_GT_TUCHUCK __attribute__((deprecated)) = MRAA_INTEL_JOULE_EXPANSION, // deprecated MRAA_PHYBOARD_WEGA = 14, /**< The phyBOARD-Wega */ // USB platform extenders start at 256 diff --git a/api/mraa/types.hpp b/api/mraa/types.hpp index 9c3cbe9..dba427e 100644 --- a/api/mraa/types.hpp +++ b/api/mraa/types.hpp @@ -51,7 +51,7 @@ typedef enum { INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */ INTEL_UP = 12, /**< The UP Board */ - INTEL_GT_TUCHUCK = 13, /**< The Intel GT Board */ + INTEL_JOULE_EXPANSION = 13, /**< The Intel Joule Expansion Board */ PHYBOARD_WEGA = 14, /**< The phyBOARD-Wega */ FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ diff --git a/docs/changelog.md b/docs/changelog.md index 0636bbb..f4fe3c1 100644 --- a/docs/changelog.md +++ b/docs/changelog.md @@ -44,25 +44,25 @@ they are listed here. Anything pre 0.2.x is ignored. **1.2.0** * JSON platform support * mock I2c functionality - * Intel Grosse Tete PWM fix + * Intel Joule PWM fix * AIO firmata bug fix **1.1.2** * Mock platform support * mraa-i2c treats i2c buses by default as linux - * grosse tete i2c fixes + * Intel Joule i2c fixes * travis now uses 14.04 instead of 12.04 **1.1.1** * IIO 4.6 kernel matrix support - * Intel Grosse Tete radio led support + * Intel Joule radio led support * mraa_init_io() examples * MRAAPLATFORMFORCE fixes * fix python documentation **1.1.0** * build python2 & python3 bindings - * Intel Grosse Tete support + * Intel Joule support * mraa_init_io() generic funtion * mraa-gpio fixes * edison PWM 0% improvements diff --git a/docs/grossetete.md b/docs/grossetete.md index fc0dd9e..f27ee06 100644 --- a/docs/grossetete.md +++ b/docs/grossetete.md @@ -1,137 +1,5 @@ -Intel Joule {#grossetete} -=========== +{#grossetete} -The Joule Board with the daughterboard (Tuchuck) board is supported by Mraa +You probably meant to go here: @joule. -Revision Support ----------------- -Tuchuck - -Interface notes ---------------- - -**SPI** - -Two SPI buses are available, with one chipselect each. Pins listed are MRAA -numbered pins. Other chip selects are available if enabled in BIOS/EEPROM but -cannot be enabled as BIOS options. You will need the spidev kernel module -loaded, Ostro-XT does this by default. - -Bus 0 (32765) -MOSI = 2 -MISO = 4 -CS = 6 -CLK = 10 - -Bus 1 (32766) -MOSI = 67 -MISO = 69 -CS0 = 59 -CS1 = 61 -CLK = 65 - -(remove 40 from numbers to get pin header number for pins on low speed header -2) - -**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART -so only available UART is on the FTDI header. Disable the getty on ttyS2 and -use mraa's uart raw mode to initialise on ttyS2. The Jumper J8 can be used to -switch between using the FTDI 6 pin header and the micro USB output. - -Pin Mapping ------------ - -Tuchuck has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The -LEDs are numbered from 100-103. - -| MRAA Number | Physical Pin | Function | -|-------------|--------------|----------| -| 1 | GPIO | GPIO | -| 2 | SPP1RX | GPIO SPI | -| 3 | PMICRST | NONE | -| 4 | SPP1TX | GPIO SPI | -| 5 | 19.2mhz | GPIO | -| 6 | SPP1FS0 | GPIO SPI | -| 7 | UART0TX | GPIO | -| 8 | SPP1FS2 | GPIO SPI | -| 9 | PWRGD | NONE | -| 10 | SPP1CLK | GPIO SPI | -| 11 | I2C0SDA | I2C | -| 12 | I2S1SDI | GPIO | -| 13 | I2C0SCL | I2C | -| 14 | I2S1SDO | GPIO | -| 15 | I2C1SDA | I2C | -| 16 | I2S1WS | GPIO | -| 17 | I2C1SCL | I2C | -| 18 | I2S1CLK | GPIO | -| 19 | I2C2SDA | I2C | -| 20 | I2S1MCL | GPIO | -| 21 | I2C2SCL | I2CO | -| 22 | UART1TX | UART | -| 23 | I2S4SDO | NONE | -| 24 | UART1RX | UART | -| 25 | I2S4SDI | NONE | -| 26 | PWM0 | GPIO PWM | -| 27 | I2S4BLK | GPIO | -| 28 | PWM1 | GPIO PWM | -| 29 | I2S4WS | NONE | -| 30 | PWM2 | GPIO PWM | -| 31 | I2S3SDO | NONE | -| 32 | PWM3 | GPIO PWM | -| 33 | I2S3SDI | NONE | -| 34 | 1.8V | NONE | -| 35 | I2S4BLK | GPIO | -| 36 | GND | NONE | -| 37 | GND | NONE | -| 38 | GND | NONE | -| 39 | GND | NONE | -| 40 | 3.3V | NONE | -| 41 | GND | NONE | -| 42 | 5V | NONE | -| 43 | GND | NONE | -| 44 | 5V | NONE | -| 45 | GND | NONE | -| 46 | 3.3V | NONE | -| 47 | GND | NONE | -| 48 | 3.3V | NONE | -| 49 | GND | NONE | -| 50 | 1.8V | NONE | -| 51 | GPIO | GPIO | -| 52 | 1.8V | NONE | -| 53 | PANEL | GPIO | -| 54 | GND | NONE | -| 55 | PANEL | GPIO | -| 56 | CAMERA | NONE | -| 57 | PANEL | GPIO | -| 58 | CAMERA | NONE | -| 59 | SPP0FS0 | GPIO SPI | -| 60 | CAMERA | NONE | -| 61 | SPP0FS1 | GPIO SPI | -| 62 | SPI_DAT | SPI | -| 63 | SPP0FS2 | GPIO SPI | -| 64 | SPICLKB | GPIO | -| 65 | SPP0FS3 | GPIO SPI | -| 66 | SPICLKA | GPIO | -| 67 | SPP0TX | GPIO SPI | -| 68 | UART0RX | GPIO UART| -| 69 | SPP0RX | GPIO SPI | -| 70 | UART0RT | GPIO UART| -| 71 | I2C1SDA | GPIO I2C | -| 72 | UART0CT | GPIO UART| -| 73 | I2C1SCL | GPIO I2C | -| 74 | UART1TX | GPIO UART| -| 75 | I2C2SDA | GPIO I2C | -| 76 | UART1RX | GPIO UART| -| 77 | I2C1SCL | GPIO I2C | -| 78 | UART1RT | GPIO UART| -| 79 | RTC_CLK | GPIO | -| 80 | UART1CT | GPIO UART| -| 100 | LED100 | GPIO | -| 101 | LED101 | GPIO | -| 102 | LED102 | GPIO | -| 103 | LED103 | GPIO | -| 104 | LEDWIFI | GPIO | -| 105 | LEDBT | GPIO | - -To see a live pin mapping use the command: -$ mraa-gpio list +Note: This page will be deleted in the future, don't link to it! diff --git a/docs/index.java.md b/docs/index.java.md index fab2af6..2dfcc3e 100644 --- a/docs/index.java.md +++ b/docs/index.java.md @@ -48,7 +48,7 @@ Specific platform information for supported platforms is documented here: - @ref phyboard-wega - @ref nuc5 - @ref up -- @ref grossetete +- @ref joule - @ref ft4222 ## DEBUGGING diff --git a/docs/index.md b/docs/index.md index e915e5d..ea9633a 100644 --- a/docs/index.md +++ b/docs/index.md @@ -48,7 +48,7 @@ Specific platform information for supported platforms is documented here: - @ref phyboard-wega - @ref nuc5 - @ref up -- @ref grossetete +- @ref joule - @ref ft4222 ## DEBUGGING diff --git a/docs/joule.md b/docs/joule.md new file mode 100644 index 0000000..50151d1 --- /dev/null +++ b/docs/joule.md @@ -0,0 +1,139 @@ +Intel Joule {#joule} +=========== + +[http://www.intel.com/joule](http://www.intel.com/joule) + +The Intel Joule expansion board is supported by Mraa + +Revision Support +---------------- +Intel Joule expansion board + +Interface notes +--------------- + +**SPI** + +Two SPI buses are available, with one chipselect each. Pins listed are MRAA +numbered pins. Other chip selects are available if enabled in BIOS/EEPROM but +cannot be enabled as BIOS options. You will need the spidev kernel module +loaded, Ostro-XT does this by default. + +Bus 0 (32765) +MOSI = 2 +MISO = 4 +CS = 6 +CLK = 10 + +Bus 1 (32766) +MOSI = 67 +MISO = 69 +CS0 = 59 +CS1 = 61 +CLK = 65 + +(remove 40 from numbers to get pin header number for pins on low speed header +2) + +**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART +so only available UART is on the FTDI header. Disable the getty on ttyS2 and +use mraa's uart raw mode to initialise on ttyS2. The Jumper J8 can be used to +switch between using the FTDI 6 pin header and the micro USB output. + +Pin Mapping +----------- + +The Intel Joule expansion board has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The +LEDs are numbered from 100-103. + +| MRAA Number | Physical Pin | Function | +|-------------|--------------|----------| +| 1 | GPIO | GPIO | +| 2 | SPP1RX | GPIO SPI | +| 3 | PMICRST | NONE | +| 4 | SPP1TX | GPIO SPI | +| 5 | 19.2mhz | GPIO | +| 6 | SPP1FS0 | GPIO SPI | +| 7 | UART0TX | GPIO | +| 8 | SPP1FS2 | GPIO SPI | +| 9 | PWRGD | NONE | +| 10 | SPP1CLK | GPIO SPI | +| 11 | I2C0SDA | I2C | +| 12 | I2S1SDI | GPIO | +| 13 | I2C0SCL | I2C | +| 14 | I2S1SDO | GPIO | +| 15 | I2C1SDA | I2C | +| 16 | I2S1WS | GPIO | +| 17 | I2C1SCL | I2C | +| 18 | I2S1CLK | GPIO | +| 19 | I2C2SDA | I2C | +| 20 | I2S1MCL | GPIO | +| 21 | I2C2SCL | I2CO | +| 22 | UART1TX | UART | +| 23 | I2S4SDO | NONE | +| 24 | UART1RX | UART | +| 25 | I2S4SDI | NONE | +| 26 | PWM0 | GPIO PWM | +| 27 | I2S4BLK | GPIO | +| 28 | PWM1 | GPIO PWM | +| 29 | I2S4WS | NONE | +| 30 | PWM2 | GPIO PWM | +| 31 | I2S3SDO | NONE | +| 32 | PWM3 | GPIO PWM | +| 33 | I2S3SDI | NONE | +| 34 | 1.8V | NONE | +| 35 | I2S4BLK | GPIO | +| 36 | GND | NONE | +| 37 | GND | NONE | +| 38 | GND | NONE | +| 39 | GND | NONE | +| 40 | 3.3V | NONE | +| 41 | GND | NONE | +| 42 | 5V | NONE | +| 43 | GND | NONE | +| 44 | 5V | NONE | +| 45 | GND | NONE | +| 46 | 3.3V | NONE | +| 47 | GND | NONE | +| 48 | 3.3V | NONE | +| 49 | GND | NONE | +| 50 | 1.8V | NONE | +| 51 | GPIO | GPIO | +| 52 | 1.8V | NONE | +| 53 | PANEL | GPIO | +| 54 | GND | NONE | +| 55 | PANEL | GPIO | +| 56 | CAMERA | NONE | +| 57 | PANEL | GPIO | +| 58 | CAMERA | NONE | +| 59 | SPP0FS0 | GPIO SPI | +| 60 | CAMERA | NONE | +| 61 | SPP0FS1 | GPIO SPI | +| 62 | SPI_DAT | SPI | +| 63 | SPP0FS2 | GPIO SPI | +| 64 | SPICLKB | GPIO | +| 65 | SPP0FS3 | GPIO SPI | +| 66 | SPICLKA | GPIO | +| 67 | SPP0TX | GPIO SPI | +| 68 | UART0RX | GPIO UART| +| 69 | SPP0RX | GPIO SPI | +| 70 | UART0RT | GPIO UART| +| 71 | I2C1SDA | GPIO I2C | +| 72 | UART0CT | GPIO UART| +| 73 | I2C1SCL | GPIO I2C | +| 74 | UART1TX | GPIO UART| +| 75 | I2C2SDA | GPIO I2C | +| 76 | UART1RX | GPIO UART| +| 77 | I2C1SCL | GPIO I2C | +| 78 | UART1RT | GPIO UART| +| 79 | RTC_CLK | GPIO | +| 80 | UART1CT | GPIO UART| +| 100 | LED100 | GPIO | +| 101 | LED101 | GPIO | +| 102 | LED102 | GPIO | +| 103 | LED103 | GPIO | +| 104 | LEDWIFI | GPIO | +| 105 | LEDBT | GPIO | + +To see a live pin mapping use the command: +$ mraa-gpio list diff --git a/include/x86/intel_gt_tuchuck.h b/include/x86/intel_joule_expansion.h similarity index 93% rename from include/x86/intel_gt_tuchuck.h rename to include/x86/intel_joule_expansion.h index 0e187ab..59991a0 100644 --- a/include/x86/intel_gt_tuchuck.h +++ b/include/x86/intel_joule_expansion.h @@ -32,10 +32,10 @@ extern "C" { // +1 as pins are "1 indexed" // we have 20 useless pins then the 4 LEDS and the 2 LEDs on the module. -#define MRAA_INTEL_GT_TUCHUCK_PINCOUNT (40*2 + 23 +1 +2) +#define MRAA_INTEL_JOULE_EXPANSION_PINCOUNT (40*2 + 23 +1 +2) mraa_board_t* -mraa_gt_tuchuck_board(); +mraa_joule_expansion_board(); #ifdef __cplusplus } diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index ca6dd1d..a1ff292 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -41,7 +41,7 @@ set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c ${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c ${PROJECT_SOURCE_DIR}/src/x86/up.c - ${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c + ${PROJECT_SOURCE_DIR}/src/x86/intel_joule_expansion.c ) message (STATUS "INFO - Adding support for platform ${MRAAPLATFORMFORCE}") @@ -67,8 +67,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_UP") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/up.c) - elseif( ${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_GT_TUCHUCK") - set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c) + elseif( ${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_JOULE_EXPANSION") + set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_joule_expansion.c) else () message (FATAL_ERROR "Unknown x86 platform enabled!") endif () diff --git a/src/x86/intel_gt_tuchuck.c b/src/x86/intel_joule_expansion.c similarity index 98% rename from src/x86/intel_gt_tuchuck.c rename to src/x86/intel_joule_expansion.c index a29594d..b4e8d64 100644 --- a/src/x86/intel_gt_tuchuck.c +++ b/src/x86/intel_joule_expansion.c @@ -29,12 +29,12 @@ #include #include "common.h" -#include "x86/intel_gt_tuchuck.h" +#include "x86/intel_joule_expansion.h" -#define PLATFORM_NAME "Intel GT Tuchuck" +#define PLATFORM_NAME "INTEL JOULE EXPANSION" mraa_board_t* -mraa_gt_tuchuck_board() +mraa_joule_expansion_board() { mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); if (b == NULL) { @@ -42,12 +42,12 @@ mraa_gt_tuchuck_board() } b->platform_name = PLATFORM_NAME; - b->phy_pin_count = MRAA_INTEL_GT_TUCHUCK_PINCOUNT; + b->phy_pin_count = MRAA_INTEL_JOULE_EXPANSION_PINCOUNT; b->aio_count = 0; b->adc_raw = 0; b->adc_supported = 0; - b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_GT_TUCHUCK_PINCOUNT, sizeof(mraa_pininfo_t)); + b->pins = (mraa_pininfo_t*) calloc(MRAA_INTEL_JOULE_EXPANSION_PINCOUNT, sizeof(mraa_pininfo_t)); if (b->pins == NULL) { goto error; } @@ -705,7 +705,7 @@ mraa_gt_tuchuck_board() return b; error: - syslog(LOG_CRIT, "GT Tuchuck: Platform failed to initialise"); + syslog(LOG_CRIT, "Intel Joule Expansion: Platform failed to initialise"); free(b); return NULL; } diff --git a/src/x86/x86.c b/src/x86/x86.c index ee71434..5506887 100644 --- a/src/x86/x86.c +++ b/src/x86/x86.c @@ -37,7 +37,7 @@ #include "x86/intel_sofia_3gr.h" #include "x86/intel_cherryhills.h" #include "x86/up.h" -#include "x86/intel_gt_tuchuck.h" +#include "x86/intel_joule_expansion.h" mraa_platform_t mraa_x86_platform() @@ -88,11 +88,11 @@ mraa_x86_platform() platform_type = MRAA_UP; plat = mraa_up_board(); } else if (strncasecmp(line, "RVP", 3) == 0) { - platform_type = MRAA_INTEL_GT_TUCHUCK; - plat = mraa_gt_tuchuck_board(); + platform_type = MRAA_INTEL_JOULE_EXPANSION; + plat = mraa_joule_expansion_board(); } else if (strncasecmp(line, "SDS", 3) == 0) { - platform_type = MRAA_INTEL_GT_TUCHUCK; - plat = mraa_gt_tuchuck_board(); + platform_type = MRAA_INTEL_JOULE_EXPANSION; + plat = mraa_joule_expansion_board(); } else { syslog(LOG_ERR, "Platform not supported, not initialising"); platform_type = MRAA_UNKNOWN_PLATFORM; @@ -133,8 +133,8 @@ mraa_x86_platform() plat = mraa_intel_cherryhills(); #elif defined(xMRAA_UP) plat = mraa_up_board(); - #elif defined(xMRAA_INTEL_GT_TUCHUCK) - plat = mraa_gt_tuchuck_board(); + #elif defined(xMRAA_INTEL_JOULE_EXPANSION) + plat = mraa_joule_expansion_board(); #else #error "Not using a valid platform value from mraa_platform_t - cannot compile" #endif