diff --git a/Android.mk b/Android.mk index ccaa41d..7a61fcf 100644 --- a/Android.mk +++ b/Android.mk @@ -37,7 +37,8 @@ LOCAL_SRC_FILES := \ src/x86/intel_sofia_3gr.c \ src/x86/intel_minnow_byt_compatible.c \ src/x86/intel_cherryhills.c \ - src/x86/up.c + src/x86/up.c \ + src/x86/intel_gt_tuchuck.c # glob.c pulled in from NetBSD project (BSD 3-clause License) LOCAL_SRC_FILES += \ diff --git a/README.md b/README.md index 2b62bf1..4a2a182 100644 --- a/README.md +++ b/README.md @@ -27,6 +27,7 @@ X86 * [Minnowboard Max](../master/docs/minnow_max.md) * [NUC 5th generation](../master/docs/intel_nuc5.md) * [UP](../master/docs/up.md) +* [Intel Grosse Tete](../master/docs/grossetete.md) ARM --- diff --git a/api/mraa/types.h b/api/mraa/types.h index d588119..5c43dd4 100644 --- a/api/mraa/types.h +++ b/api/mraa/types.h @@ -50,6 +50,7 @@ typedef enum { MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ MRAA_INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */ MRAA_UP = 12, /**< The UP Board */ + MRAA_INTEL_GT_TUCHUCK = 13, /**< The Intel GT Tuchuck Board */ // USB platform extenders start at 256 MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ diff --git a/api/mraa/types.hpp b/api/mraa/types.hpp index a1c936f..4aa50a8 100644 --- a/api/mraa/types.hpp +++ b/api/mraa/types.hpp @@ -50,6 +50,8 @@ typedef enum { A96BOARDS = 9, /**< Linaro 96boards, A prefix for 'ARM' since not allowed numerical */ INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ INTEL_CHERRYHILLS = 11, /**< The Intel Braswell Cherryhills */ + INTEL_UP = 12, /**< The UP Board */ + INTEL_GT_TUCHUCK = 13, /**< The Intel GT Board */ FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ diff --git a/docs/grossetete.md b/docs/grossetete.md new file mode 100644 index 0000000..47ac0bb --- /dev/null +++ b/docs/grossetete.md @@ -0,0 +1,112 @@ +Grosse Tete {#grossetete} +=========== + +The Grosse Tete with the Tuchuck board is supported by Mraa + +Revision Support +---------------- +Tuchuck + +Interface notes +--------------- + +**SPI** Currently not working + +**UART** Some pins are labelled as UARTs but are not configured in BIOS as UART +so only available UART is on the FTDI header + +Pin Mapping +----------- + +Tuchuck has two breakouts, breakout #1 is 1-40 whilst breakout2 is 41-80. The +LEDs are numbered from 100-103. + +| MRAA Number | Physical Pin | Function | +|-------------|--------------|----------| +| 1 | GPIO | GPIO | +| 2 | SPP1RX | GPIO | +| 3 | PMICRST | NONE | +| 4 | SPP1TX | GPIO | +| 5 | 19.2mhz | GPIO | +| 6 | SPP1FS0 | GPIO | +| 7 | UART0TX | GPIO | +| 8 | SPP1FS2 | GPIO | +| 9 | PWRGD | NONE | +| 10 | SPP1CLK | GPIO | +| 11 | I2C0SDA | I2C | +| 12 | I2S1SDI | GPIO | +| 13 | I2C0SCL | I2C | +| 14 | I2S1SDO | GPIO | +| 15 | I2C1SDA | I2C | +| 16 | I2S1WS | GPIO | +| 17 | I2C1SCL | I2C | +| 18 | I2S1CLK | GPIO | +| 19 | I2C2SDA | I2C | +| 20 | I2S1MCL | GPIO | +| 21 | I2C2SCL | I2CO | +| 22 | UART1TX | UART | +| 23 | I2S4SDO | NONE | +| 24 | UART1RX | UART | +| 25 | I2S4SDI | NONE | +| 26 | PWM0 | GPIO PWM | +| 27 | I2S4BLK | GPIO | +| 28 | PWM1 | GPIO PWM | +| 29 | I2S4WS | NONE | +| 30 | PWM2 | GPIO PWM | +| 31 | I2S3SDO | NONE | +| 32 | PWM3 | GPIO PWM | +| 33 | I2S3SDI | NONE | +| 34 | 1.8V | NONE | +| 35 | I2S4BLK | GPIO | +| 36 | GND | NONE | +| 37 | GND | NONE | +| 38 | GND | NONE | +| 39 | GND | NONE | +| 40 | 3.3V | NONE | +| 41 | GND | NONE | +| 42 | 5V | NONE | +| 43 | GND | NONE | +| 44 | 5V | NONE | +| 45 | GND | NONE | +| 46 | 3.3V | NONE | +| 47 | GND | NONE | +| 48 | 3.3V | NONE | +| 49 | GND | NONE | +| 50 | 1.8V | NONE | +| 51 | GPIO | GPIO | +| 52 | 1.8V | NONE | +| 53 | PANEL | GPIO | +| 54 | GND | NONE | +| 55 | PANEL | GPIO | +| 56 | CAMERA | NONE | +| 57 | PANEL | GPIO | +| 58 | CAMERA | NONE | +| 59 | SPP0FS0 | GPIO | +| 60 | CAMERA | NONE | +| 61 | SPP0FS1 | GPIO | +| 62 | SPI_DAT | SPI | +| 63 | SPP0FS2 | GPIO | +| 64 | SPICLKB | GPIO SPI | +| 65 | SPP0FS3 | GPIO | +| 66 | SPICLKA | GPIO SPI | +| 67 | SPP0TX | GPIO | +| 68 | UART0RX | GPIO UART| +| 69 | SPP0RX | GPIO | +| 70 | UART0RT | GPIO UART| +| 71 | I2C1SDA | GPIO I2C | +| 72 | UART0CT | GPIO UART| +| 73 | I2C1SCL | GPIO I2C | +| 74 | UART1TX | GPIO UART| +| 75 | I2C2SDA | GPIO I2C | +| 76 | UART1RX | GPIO UART| +| 77 | I2C1SCL | GPIO I2C | +| 78 | UART1RT | GPIO UART| +| 79 | RTC_CLK | GPIO | +| 80 | UART1CT | GPIO UART| +| 100 | LED100 | GPIO | +| 101 | LED101 | GPIO | +| 102 | LED102 | GPIO | +| 103 | LED103 | GPIO | + +To see a live pin mapping use the command: +$ mraa-gpio list diff --git a/docs/index.java.md b/docs/index.java.md index 0207414..56154d1 100644 --- a/docs/index.java.md +++ b/docs/index.java.md @@ -46,6 +46,8 @@ Specific platform information for supported platforms is documented here: - @ref bananapi - @ref beaglebone - @ref nuc5 +- @ref up +- @ref grossetete - @ref ft4222 ## DEBUGGING diff --git a/docs/index.md b/docs/index.md index ec98f16..3fa106d 100644 --- a/docs/index.md +++ b/docs/index.md @@ -47,6 +47,7 @@ Specific platform information for supported platforms is documented here: - @ref beaglebone - @ref nuc5 - @ref up +- @ref grossetete - @ref ft4222 ## DEBUGGING diff --git a/include/x86/intel_gt_tuchuck.h b/include/x86/intel_gt_tuchuck.h new file mode 100644 index 0000000..f9254a1 --- /dev/null +++ b/include/x86/intel_gt_tuchuck.h @@ -0,0 +1,42 @@ +/* + * Author: Brendan Le Foll + * Copyright (c) 2016 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mraa_internal.h" + +// +1 as pins are "1 indexed" +// we have 20 useless pins then the 4 LEDS +#define MRAA_INTEL_GT_TUCHUCK_PINCOUNT (40*2 + 23 +1) + +mraa_board_t* +mraa_gt_tuchuck_board(); + +#ifdef __cplusplus +} +#endif diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 675d897..0f5adb2 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -41,6 +41,7 @@ set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c ${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c ${PROJECT_SOURCE_DIR}/src/x86/up.c + ${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c ) message (STATUS "INFO - Adding support for platform ${MRAAPLATFORMFORCE}") @@ -66,6 +67,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_cherryhills.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_UP") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/up.c) + elseif( ${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_GT_TUCHUCK") + set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_gt_tuchuck.c) else () message (FATAL_ERROR "Unknown x86 platform enabled!") endif () diff --git a/src/x86/intel_gt_tuchuck.c b/src/x86/intel_gt_tuchuck.c new file mode 100644 index 0000000..107c165 --- /dev/null +++ b/src/x86/intel_gt_tuchuck.c @@ -0,0 +1,636 @@ +/* + * Author: Brendan Le Foll + * Copyright (c) 2016 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "common.h" +#include "x86/intel_gt_tuchuck.h" + +#define PLATFORM_NAME "Intel GT Tuchuck" + +mraa_board_t* +mraa_gt_tuchuck_board() +{ + mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); + if (b == NULL) { + return NULL; + } + + b->platform_name = PLATFORM_NAME; + b->phy_pin_count = MRAA_INTEL_GT_TUCHUCK_PINCOUNT; + b->aio_count = 0; + b->adc_raw = 0; + b->adc_supported = 0; + + b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_GT_TUCHUCK_PINCOUNT); + if (b->pins == NULL) { + goto error; + } + + b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); + if (b->adv_func == NULL) { + free(b->pins); + goto error; + } + + b->pwm_default_period = 5000; + b->pwm_max_period = 218453; + b->pwm_min_period = 1; + + b->i2c_bus_count = 3; + b->i2c_bus[0].bus_id = 0; + b->i2c_bus[0].sda = 11; + b->i2c_bus[0].scl = 13; + b->i2c_bus[1].bus_id = 5; + b->i2c_bus[1].sda = 15; + b->i2c_bus[1].scl = 17; + b->i2c_bus[1].bus_id = 6; + b->i2c_bus[1].sda = 19; + b->i2c_bus[1].scl = 21; + b->def_i2c_bus = b->i2c_bus[0].bus_id; + +#if 0 + b->spi_bus_count = 6; + b->def_spi_bus = 0; + b->spi_bus[0].bus_id = 32764; + b->spi_bus[0].slave_s = 1; + b->spi_bus[1].bus_id = 32764; + b->spi_bus[1].slave_s = 2; + b->spi_bus[2].bus_id = 32765; + b->spi_bus[2].slave_s = 0; + b->spi_bus[3].bus_id = 32765; + b->spi_bus[3].slave_s = 1; + b->spi_bus[4].bus_id = 32766; + b->spi_bus[4].slave_s = 0; + b->spi_bus[5].bus_id = 32766; + b->spi_bus[5].slave_s = 1; +#endif + + int pos = 0; + + strncpy(b->pins[pos].name, "INVALID", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GPIO", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 446; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP1RX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 421; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PMICRST", 8); + // disabled as this pin causes a reset + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 366; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP1TX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 422; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "19.2mhz", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 356; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP1FS0", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 417; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART0TX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + // not configured as GPIO + //b->pins[pos].gpio.pinmap = 462; + //b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP1FS2", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 419; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PWRGD", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + // not configured as GPI0 - does read work? + //b->pins[pos].gpio.pinmap = 365; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP1CLK", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 416; + b->pins[pos].gpio.mux_total = 0; + pos++; + + // pin 11 + strncpy(b->pins[pos].name, "I2C0SDA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 315; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S1SDI", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 381; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C0SCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 316; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S1SDO", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 382; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C1SDA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 331; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S1WS", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 380; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C1SCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 332; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S1CLK", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 379; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C2SDA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 333; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S1MCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 378; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C2SCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 334; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + pos++; + + strncpy(b->pins[pos].name, "UART1TX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + //b->pins[pos].gpio.pinmap = 472; + //b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S4SDO", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + // doesn't work so disable + //b->pins[pos].gpio.pinmap = 396; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART1RX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + //b->pins[pos].gpio.pinmap = 471; + //b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S4SDI", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + // doesnt work + //b->pins[pos].gpio.pinmap = 395; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PWM0", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 463; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].pwm.pinmap = 0; + b->pins[pos].pwm.parent_id = 0; + b->pins[pos].pwm.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S4BLK", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + // this pin has a voltage of 0.34V in 'low' mode - beware! + b->pins[pos].gpio.pinmap = 397; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PWM1", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 464; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].pwm.pinmap = 1; + b->pins[pos].pwm.parent_id = 0; + b->pins[pos].pwm.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S4WS", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + // not working + //b->pins[pos].gpio.pinmap = 398; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PWM2", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 465; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].pwm.pinmap = 2; + b->pins[pos].pwm.parent_id = 0; + b->pins[pos].pwm.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S3SDO", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + //b->pins[pos].gpio.pinmap = 400; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "PWM3", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 466; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].pwm.pinmap = 3; + b->pins[pos].pwm.parent_id = 0; + b->pins[pos].pwm.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2S3SDI", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + //b->pins[pos].gpio.pinmap = 399; + //b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "1.8V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "I2S4BLK", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 393; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "3.3V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + // second header + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "5V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "5V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "3.3V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "3.3V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "1.8V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "GPIO", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 456; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "1.8V", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "PANEL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 270; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "GND", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "PANEL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 271; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "CAMERA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "PANEL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 272; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "CAMERA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "SPP0FS0", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 411; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "CAMERA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + + strncpy(b->pins[pos].name, "SPP0FS1", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 412; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPI_DAT", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 1, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 385; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP0FS2", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 411; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPICLKB", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 384; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP0FS3", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 410; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPICLKA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 383; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP0TX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 414; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART0RX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 467; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "SPP0RX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 415; + b->pins[pos].gpio.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART0RT", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 469; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C1SDA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 317; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART0CT", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 412; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C1SCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 318; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART1TX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 484; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C2SDA", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 319; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART1RX", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 483; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "I2C1SCL", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }; + b->pins[pos].gpio.pinmap = 320; + b->pins[pos].gpio.mux_total = 0; + b->pins[pos].i2c.pinmap = 0; + b->pins[pos].i2c.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "UART1RT", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 485; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + strncpy(b->pins[pos].name, "RTC_CLK", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 367; + pos++; + + strncpy(b->pins[pos].name, "UART1CT", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].gpio.pinmap = 486; + b->pins[pos].uart.pinmap = 0; + b->pins[pos].uart.parent_id = 0; + b->pins[pos].uart.mux_total = 0; + pos++; + + while (pos != 100) { + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }; + pos++; + } + + strncpy(b->pins[pos].name, "LED100", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 337; + pos++; + + strncpy(b->pins[pos].name, "LED101", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + // if BIOS is pre-L then this is 338 + b->pins[pos].gpio.pinmap = 395; + pos++; + + strncpy(b->pins[pos].name, "LED102", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 339; + pos++; + + strncpy(b->pins[pos].name, "LED103", 8); + b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; + b->pins[pos].gpio.pinmap = 340; + pos++; + + return b; + +error: + syslog(LOG_CRIT, "GT Tuchuck: Platform failed to initialise"); + free(b); + return NULL; +} diff --git a/src/x86/x86.c b/src/x86/x86.c index 2f1be3a..0760ab9 100644 --- a/src/x86/x86.c +++ b/src/x86/x86.c @@ -37,6 +37,7 @@ #include "x86/intel_sofia_3gr.h" #include "x86/intel_cherryhills.h" #include "x86/up.h" +#include "x86/intel_gt_tuchuck.h" mraa_platform_t mraa_x86_platform() @@ -86,6 +87,12 @@ mraa_x86_platform() } else if (strncasecmp(line, "UP-CHT01", 8) == 0) { platform_type = MRAA_UP; plat = mraa_up_board(); + } else if (strncasecmp(line, "RVP", 3) == 0) { + platform_type = MRAA_INTEL_GT_TUCHUCK; + plat = mraa_gt_tuchuck_board(); + } else if (strncasecmp(line, "SDS", 3) == 0) { + platform_type = MRAA_INTEL_GT_TUCHUCK; + plat = mraa_gt_tuchuck_board(); } else { syslog(LOG_ERR, "Platform not supported, not initialising"); platform_type = MRAA_UNKNOWN_PLATFORM; @@ -126,6 +133,8 @@ mraa_x86_platform() plat = mraa_intel_cherryhills(); #elif defined(xMRAA_UP) plat = mraa_up_board(); + #elif defined(MRAA_INTEL_GT_TUCHUCK) + plat = mraa_gt_tuchuck_board(); #else #error "Not using a valid platform value from mraa_platform_t - cannot compile" #endif