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platform: Add RISC-V architecture with VisionFive

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Add RISC-V architecture and StarFive JH71x0-based boards
VisionFive and VisionFive 2.

Signed-off-by: Daniel Bovensiepen <oss@bovi.li>
Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>
This commit is contained in:
Daniel Bovensiepen
2023-09-22 00:07:30 +08:00
committed by Tom Ingleby
parent 7c2ba41718
commit 0df2e0f417
12 changed files with 659 additions and 2 deletions
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4
CMakeLists.txt
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@@ -192,10 +192,12 @@ elseif (DETECTED_ARCH MATCHES "mips")
set (MIPSPLAT ON)
elseif (DETECTED_ARCH STREQUAL "MOCK")
set (MOCKPLAT ON)
elseif (DETECTED_ARCH STREQUAL "riscv64")
set (RISCVPLAT ON)
elseif (DETECTED_ARCH STREQUAL "PERIPHERALMAN")
set (PERIPHERALMAN ON)
else ()
message (FATAL_ERROR "Only x86, arm, mips, PERIPHERALMAN and mock platforms currently supported")
message (FATAL_ERROR "Only x86, arm, mips, riscv, PERIPHERALMAN and mock platforms currently supported")
endif()
if (BUILDSWIGPYTHON OR BUILDTESTS)