platform: Add RISC-V architecture with VisionFive
Add RISC-V architecture and StarFive JH71x0-based boards VisionFive and VisionFive 2. Signed-off-by: Daniel Bovensiepen <oss@bovi.li> Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>
This commit is contained in:
committed by
Tom Ingleby
parent
7c2ba41718
commit
0df2e0f417
Reference in New Issue
Block a user