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platform: Add RISC-V architecture with VisionFive

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Add RISC-V architecture and StarFive JH71x0-based boards
VisionFive and VisionFive 2.

Signed-off-by: Daniel Bovensiepen <oss@bovi.li>
Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>
This commit is contained in:
Daniel Bovensiepen
2023-09-22 00:07:30 +08:00
committed by Tom Ingleby
parent 7c2ba41718
commit 0df2e0f417
12 changed files with 659 additions and 2 deletions
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2
api/mraa/types.h
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@@ -70,6 +70,8 @@ typedef enum {
MRAA_INTEL_ILK = 25, /**< Intel Learning Kit */
MRAA_SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */
MRAA_RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */
MRAA_VISIONFIVE = 28, /**< StarFive VisionFive board */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */

1
api/mraa/types.hpp
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@@ -64,6 +64,7 @@ typedef enum {
INTEL_UPXTREME = 24, /**< The UPXTREME Board */
SIEMENS_IOT2050 = 26, /**< Siemens IOT2050 board */
RADXA_ROCK_3C = 27, /**< Radxa ROCK 3 Model C */
VISIONFIVE = 28, /**< StarFive VisionFive board */
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */