platform: Add RISC-V architecture with VisionFive

Add RISC-V architecture and StarFive JH71x0-based boards
VisionFive and VisionFive 2.

Signed-off-by: Daniel Bovensiepen <oss@bovi.li>
Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>

include/riscv/visionfive.h

@@ -0,0 +1,24 @@
+/*
+ * Author: Daniel Bovensiepen <oss@bovi.li>
+ * Author: Zhu Jia Xing <jiaxing.zhu@siemens.com>
+ * Copyright (c) 2022 Siemens Ltd. China.
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#pragma once
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "mraa_internal.h"
+
+#define MRAA_VISIONFIVE_PINCOUNT 41
+
+mraa_board_t *
+        mraa_visionfive();
+
+#ifdef __cplusplus
+}
+#endif