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platform: Add RISC-V architecture with VisionFive

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Add RISC-V architecture and StarFive JH71x0-based boards
VisionFive and VisionFive 2.

Signed-off-by: Daniel Bovensiepen <oss@bovi.li>
Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>
This commit is contained in:
Daniel Bovensiepen
2023-09-22 00:07:30 +08:00
committed by Tom Ingleby
parent 7c2ba41718
commit 0df2e0f417
12 changed files with 659 additions and 2 deletions
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10
src/CMakeLists.txt
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@@ -130,6 +130,11 @@ set (mraa_LIB_MOCK_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/mock/mock_board_uart.c
)
set (mraa_LIB_RISCV_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/riscv/riscv.c
${PROJECT_SOURCE_DIR}/src/riscv/visionfive.c
)
set (mraa_LIB_PERIPHERALMAN_SRCS_NOAUTO
${PROJECT_SOURCE_DIR}/src/peripheralman/peripheralman.c
)
@@ -170,6 +175,11 @@ if (MOCKPLAT)
endif ()
endif()
if (RISCVPLAT)
add_subdirectory(riscv)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DRISCVPLAT=1")
endif()
if (PERIPHERALMAN)
set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DPERIPHERALMAN=1")