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platform: Add RISC-V architecture with VisionFive

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Add RISC-V architecture and StarFive JH71x0-based boards
VisionFive and VisionFive 2.

Signed-off-by: Daniel Bovensiepen <oss@bovi.li>
Signed-off-by: Zhu Jia Xing <jiaxing.zhu@siemens.com>
This commit is contained in:
Daniel Bovensiepen
2023-09-22 00:07:30 +08:00
committed by Tom Ingleby
parent 7c2ba41718
commit 0df2e0f417
12 changed files with 659 additions and 2 deletions
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src/riscv/CMakeLists.txt Normal file
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@@ -0,0 +1,3 @@
message (INFO " - Adding RISC-V platforms")
set (mraa_LIB_PLAT_SRCS_NOAUTO ${mraa_LIB_SRCS_NOAUTO}
${mraa_LIB_RISCV_SRCS_NOAUTO} PARENT_SCOPE)