api: remove internal strut from public API

Moved for internal use only

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>

include/mraa_internal_types.h

@@ -94,3 +94,140 @@ struct _uart {
     char* path; /**< the uart device path. */
     /*@}*/
 };
+
+/**
+ * A bitfield representing the capabilities of a pin.
+ */
+typedef struct {
+    /*@{*/
+    mraa_boolean_t valid:1;     /**< Is the pin valid at all */
+    mraa_boolean_t gpio:1;      /**< Is the pin gpio capable */
+    mraa_boolean_t pwm:1;       /**< Is the pin pwm capable */
+    mraa_boolean_t fast_gpio:1; /**< Is the pin fast gpio capable */
+    mraa_boolean_t spi:1;       /**< Is the pin spi capable */
+    mraa_boolean_t i2c:1;       /**< Is the pin i2c capable */
+    mraa_boolean_t aio:1;       /**< Is the pin analog input capable */
+    mraa_boolean_t uart:1;       /**< Is the pin uart capable */
+    /*@}*/
+} mraa_pincapabilities_t;
+
+/**
+ * A Structure representing a multiplexer and the required value
+ */
+typedef struct {
+    /*@{*/
+    unsigned int pin;   /**< Raw GPIO pin id */
+    unsigned int value; /**< Raw GPIO value */
+    /*@}*/
+} mraa_mux_t;
+
+typedef struct {
+    mraa_boolean_t complex_pin:1;
+    mraa_boolean_t output_en:1;
+    mraa_boolean_t output_en_high:1;
+    mraa_boolean_t pullup_en:1;
+    mraa_boolean_t pullup_en_hiz:1;
+} mraa_pin_cap_complex_t;
+
+typedef struct {
+    /*@{*/
+    unsigned int pinmap; /**< sysfs pin */
+    unsigned int parent_id; /** parent chip id */
+    unsigned int mux_total; /** Numfer of muxes needed for operation of pin */
+    mraa_mux_t mux[6]; /** Array holding information about mux */
+    unsigned int output_enable; /** Output Enable GPIO, for level shifting */
+    unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */
+    mraa_pin_cap_complex_t complex_cap;
+    /*@}*/
+} mraa_pin_t;
+
+typedef struct {
+    /*@{*/
+    char mem_dev[32]; /**< Memory device to use /dev/uio0 etc */
+    unsigned int mem_sz; /** Size of memory to map */
+    unsigned int bit_pos; /** Position of value bit */
+    mraa_pin_t gpio; /** GPio context containing none mmap info */
+    /*@}*/
+} mraa_mmap_pin_t;
+
+/**
+ * A Structure representing a physical Pin.
+ */
+typedef struct {
+    /*@{*/
+    char name[8];                      /**< Pin's real world name */
+    mraa_pincapabilities_t capabilites; /**< Pin Capabiliites */
+    mraa_pin_t gpio; /**< GPIO structure */
+    mraa_pin_t pwm;  /**< PWM structure */
+    mraa_pin_t aio;  /**< Anaglog Pin */
+    mraa_mmap_pin_t mmap; /**< GPIO through memory */
+    mraa_pin_t i2c;  /**< i2c bus/pin */
+    mraa_pin_t spi;  /**< spi bus/pin */
+    mraa_pin_t uart;  /**< uart module/pin */
+    /*@}*/
+} mraa_pininfo_t;
+
+/**
+ * A Structure representing the physical properties of a i2c bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< ID as exposed in the system */
+    unsigned int scl; /**< i2c SCL */
+    unsigned int sda; /**< i2c SDA */
+    /*@}*/
+} mraa_i2c_bus_t;
+
+/**
+ * A Structure representing the physical properties of a spi bus.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int bus_id; /**< The Bus ID as exposed to the system. */
+    unsigned int slave_s; /**< Slave select */
+    mraa_boolean_t three_wire; /**< Is the bus only a three wire system */
+    unsigned int sclk; /**< Serial Clock */
+    unsigned int mosi; /**< Master Out, Slave In. */
+    unsigned int miso; /**< Master In, Slave Out. */
+    unsigned int cs; /**< Chip Select, used when the board is a spi slave */
+    /*@}*/
+} mraa_spi_bus_t;
+
+/**
+ * A Structure representing a uart device.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int index; /**< ID as exposed in the system */
+    int rx; /**< uart rx */
+    int tx; /**< uart tx */
+    const char* device_path; /**< To store "/dev/ttyS1" for example */
+    /*@}*/
+} mraa_uart_dev_t;
+
+/**
+ * A Structure representing a platform/board.
+ */
+typedef struct {
+    /*@{*/
+    unsigned int phy_pin_count; /**< The Total IO pins on board */
+    unsigned int gpio_count; /**< GPIO Count */
+    unsigned int aio_count;  /**< Analog side Count */
+    unsigned int i2c_bus_count; /**< Usable i2c Count */
+    mraa_i2c_bus_t  i2c_bus[12]; /**< Array of i2c */
+    unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
+    unsigned int spi_bus_count; /**< Usable spi Count */
+    mraa_spi_bus_t spi_bus[12];       /**< Array of spi */
+    unsigned int def_spi_bus; /**< Position in array of defult spi bus */
+    unsigned int adc_raw; /**< ADC raw bit value */
+    unsigned int adc_supported; /**< ADC supported bit value */
+    unsigned int def_uart_dev; /**< Position in array of defult uart */
+    unsigned int uart_dev_count; /**< Usable spi Count */
+    mraa_uart_dev_t uart_dev[6]; /**< Array of UARTs */
+    int pwm_default_period; /**< The default PWM period is US */
+    int pwm_max_period; /**< Maximum period in us */
+    int pwm_min_period; /**< Minimum period in us */
+    const char* platform_name; /**< Platform Name pointer */
+    mraa_pininfo_t* pins;     /**< Pointer to pin array */
+    /*@}*/
+} mraa_board_t;