docs: fix some poor spelling & phrasing in docs
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
@@ -14,13 +14,10 @@ confuse some, it's typically not an issue as platforms rarely expose more than
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one of these for user use and so when this is the case, libmraa will always use
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the bus in the pinmapper. For example edison uses i2c #6 but since there is
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only one, libmraa will try to be helpful and everything is treated as 6 when
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doing a mraa_i2c_init and so when this is the case, libmraa will always use the
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bus in the pinmapper. For example edison uses i2c #6 but since there is only
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one, libmraa will try to be helpful and everything is treated as 6 when doing a
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mraa_i2c_init(). The _raw functions will override the pinmapper and can be
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accessed without a valid board configuration. This can be helpful either in
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doing a mraa_i2c_init(). The _raw functions will override the pinmapper and can
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be accessed without a valid board configuration. This can be helpful either in
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development of platform configurations for mraa or when modifying kernels
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etc... The mechanism is used heavily internaly.
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etc... Internally the mechanism is used heavily.
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In libmraa, all code is split into 7 modules, src/{i2c, spi, gpio, uart, pwm,
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aio and common}. These should be fairly self explanatory in goals/purpose but a
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@@ -52,10 +49,10 @@ also where platform hooks can be defined, functions that will be run at various
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The mraa_pininfo_t structure needs to be set for the board pincount (set in a
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macro in the platform configuration header. Every pin will have a
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mraa_pincapabilities_t which will define what it can do. The doxygen doc
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explains how this works but it's essentially a bitfield which needs to be set
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for every capability the pin can have. Gpios can have multiple muxes which will
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be set at the gpio init before it can be toggled.
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mraa_pincapabilities_t which will define what it can do. The doxygen
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documentation explains how this works but it's essentially a bitfield which
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needs to be set for every capability the pin can have. Gpios can have multiple
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muxes which will be set at the gpio init before it can be toggled.
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### i2c ###
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@@ -68,8 +65,9 @@ i2c/smbus.c. This library simply makes it easier for us to handle the error
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conditions that can arrise when writing on i2c buses. Essentially the API is
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fairly simple consisting of writes & reads.
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Careful - on alot of platforms i2cdetect will often crash, for finding your i2c
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addresses please look at your sensors datasheet!
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Careful - on alot of platforms i2cdetect will often crash. To findi your i2c
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addresses please look at your sensor's datasheet! If using i2cdetect most
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platforms do not support SMBus quick write so use the '-r' flag.
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### spi ###
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@@ -78,9 +76,9 @@ chip select from spidev. Spi(0) could lead to spidev5.1 and Spi(1) to
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spidev5.2. Typically on a micro using a random gpio as a chip select works
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well, and on some platforms if one is careful with threads this can work well
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with mraa. However when a kernel module shares the same bus as spidev (but on a
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different CS) this behaviour is *very* dangerous. Platforms such as galileo
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gen2 & edison + arduino breakout work this way. Mraa will not help you in using
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a non HW chip select, do so at your own peril!
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different CS) this behaviour is *very* dangerous. Platforms such as Galileo
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Gen2 & Edison + Arduino breakout board work this way. Mraa will not help you in
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using a non hardware chip select, do so at your own peril!
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### gpio ###
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@@ -100,9 +98,8 @@ definition.
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GPIOs are typically interfaced via sysfs because that's easier for us but we
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can also work with fast gpio. This is typically preffered to do mmap gpio
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access. This is however trickier and typically relies on lots of platform
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hooks. We do support by default to go hit /dev/mem or another device at
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specific addresses to toggle gpios which is how mmap access works on some
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boards.
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hooks. By default we support hitting /dev/mem or another device at specific
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addresses to toggle gpios which is how mmap access works on some boards.
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Note that in Linux gpios are numbered from ARCH_NR_GPIOS down. This means that
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if ARCH_NR_GPIOS is changed, the gpio numbering will change. In 3.18+ the
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@@ -119,16 +116,16 @@ set the pinmapper correctly for uart to work on some platforms.
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### aio ###
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AIO pins are numbered after GPIO pins. This means that on arduino style boards
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AIO pins are numbered after GPIO pins. This means that on Arduino style boards
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pin 14 is A0. Typically mraa will only support an ADC if a platform ships with
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one and has a good kernel module for it. extra i2c/spi ADCs can be supported
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one and has a good kernel module for it. Extra i2c/spi ADCs can be supported
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via something like UPM but are unlikely to receive support in mraa at the moment.
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Note that giving mraa_aio_init(0) will literally query the pinmapper for
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board->gpio_count + 0 so you must place your aio pins after gpio_count. This is
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the default behaviour but can of course be overriden by advance function
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pointers. Whilst maybe not the sanest of defaults, most of the hobbyist boards
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we deal with follow a similar naming pattern to arduino or have no ADC so for
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we deal with follow a naming pattern similar to Arduino or have no ADC so for
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now we have considered this sensible.
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### Initialisation ###
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@@ -136,13 +133,13 @@ now we have considered this sensible.
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mraa_init() needs to be called in order to initialise the platform files or
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'pinmap'. Because calling this is tedious libmraa uses a C constructor to run
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mraa_init on library load. This means that it is not possible to stop this
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running and all functino calls like mraa_set_log_level() will not work during
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mraa_init(). This feature is supported by most sane compilers & libcs but you
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running and all function calls like mraa_set_log_level() will not work during
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mraa_init(). This feature is supported by most sane compilers and libcs but you
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can turn off CTORS in uclibc, though I've yet to find a configuration with
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someone doing that. mraa_init() can be called multiple times if you feel like
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being 'safe'.
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In the SWIG modulse mraa_init() is called during the %init stage of the module
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In the SWIG modules mraa_init() is called during the %init stage of the module
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loading. This is simply to avoid mraa_init() running 'too' early, though I've
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never seen an issue in running it in a CTOR.
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@@ -150,15 +147,15 @@ never seen an issue in running it in a CTOR.
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At the time when libmraa was created (still the case?) the only - working -
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API/wrapper generation tool that supported nodejs was SWIG. For more general
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information on swig please see the swig documentation.
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information on SWIG please see the SWIG documentation.
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The src/{javascript, python} & src/mraa.i folders contain all the files for the
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swig generation. The C++ headers in api/mraa/ are given as input sources to
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SWIG generation. The C++ headers in api/mraa/ are given as input sources to
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SWIG. SWIG modules do not link to libmraa (although maybe that would be a good
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idea...)
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Typemaps are used heavily to map uint8_t* pointers to bytearrays and
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node_buffers. These are native python & nodejs types that represent uint8_t
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node_buffers. These are native python & node.js types that represent uint8_t
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data the best and are very well supported in both languages. Argument
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conversions and memory allocations are performed so the performance of using
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these functions compared to the C/C++ equivalent will likely be a little lower,
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@@ -172,7 +169,7 @@ array to generate a binding.gyp file from the skeleton binding.gyp.cmake in
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src/javascript. Because we don't expect most NPM users to have SWIG we
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precompile the src/mraajsJAVASCRIPT_wrap.cxx. The src/version.c is already
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known since this is a static tarball so we write that too. These files are
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placed not in a build/ dir but in the main mraa dir. You can then tar the dir
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up and send it to NPM. This is done automatically on every commit by our
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automated build system.
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placed not in a build/ directory but in the main mraa directory. You can then
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tar the directory up and send it to NPM. This is done automatically on every
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commit by our automated build system.
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