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mux: add mux interface

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Add mux_init_reg interface with different mux modes for GPIO, UART, SPI,
I2C, PWM, AIO.

Signed-off-by: Le Jin <le.jin@siemens.com>
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
This commit is contained in:
Ivan Mikhaylov
2022-07-13 21:18:00 +00:00
committed by Tom Ingleby
parent 046bdd0adb
commit 307a6f3bdd
8 changed files with 105 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
include/mraa_adv_func.h
View File

@@ -106,4 +106,6 @@ typedef struct {
int (*uart_read_replace) (mraa_uart_context dev, char* buf, size_t len); int (*uart_read_replace) (mraa_uart_context dev, char* buf, size_t len);
int (*uart_write_replace)(mraa_uart_context dev, const char* buf, size_t len); int (*uart_write_replace)(mraa_uart_context dev, const char* buf, size_t len);
mraa_boolean_t (*uart_data_available_replace) (mraa_uart_context dev, unsigned int millis); mraa_boolean_t (*uart_data_available_replace) (mraa_uart_context dev, unsigned int millis);
mraa_result_t (*mux_init_reg) (int phy_pin, int mode);
} mraa_adv_func_t; } mraa_adv_func_t;

13
include/mraa_internal_types.h
View File

@@ -312,6 +312,19 @@ typedef enum {
} pincmd_t; } pincmd_t;
/**
* Enum representing different mux register mode
*/
typedef enum {
MUX_REGISTER_MODE_GPIO = 0, /**< GPIO mode */
MUX_REGISTER_MODE_UART = 1, /**< UART mode */
MUX_REGISTER_MODE_I2C = 2, /**< I2C mode */
MUX_REGISTER_MODE_SPI = 3, /**< SPI mode */
MUX_REGISTER_MODE_PWM = 4, /**< PWM mode */
MUX_REGISTER_MODE_AIO = 5, /**< AIO mode */
MAX_MUX_REGISTER_MODE
} mux_register_mode_t;
/** /**
* A Structure representing a multiplexer and the required value * A Structure representing a multiplexer and the required value
*/ */

7
src/aio/aio.c
View File

@@ -119,7 +119,12 @@ mraa_aio_init(unsigned int aio)
return NULL; return NULL;
} }
} }
if (board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pin, MUX_REGISTER_MODE_AIO) != MRAA_SUCCESS) {
syslog(LOG_ERR, "aio: unable to setup multiplex register for pin");
return NULL;
}
}
// Create ADC device connected to specified channel // Create ADC device connected to specified channel
mraa_aio_context dev = mraa_aio_init_internal(board->adv_func, aio, board->pins[pin].aio.pinmap); mraa_aio_context dev = mraa_aio_init_internal(board->adv_func, aio, board->pins[pin].aio.pinmap);
if (dev == NULL) { if (dev == NULL) {

14
src/gpio/gpio.c
View File

@@ -309,7 +309,12 @@ mraa_gpio_init(int pin)
return NULL; return NULL;
} }
} }
if (board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pin, MUX_REGISTER_MODE_GPIO) != MRAA_SUCCESS) {
syslog(LOG_ERR, "gpio%i: init: unable to setup multiplex register", pin);
return NULL;
}
}
mraa_gpio_context r = mraa_gpio_init_internal(board->adv_func, board->pins[pin].gpio.pinmap); mraa_gpio_context r = mraa_gpio_init_internal(board->adv_func, board->pins[pin].gpio.pinmap);
if (r == NULL) { if (r == NULL) {
@@ -408,6 +413,13 @@ mraa_gpio_chardev_init(int pins[], int num_pins)
} }
} }
if (board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pins[i], MUX_REGISTER_MODE_GPIO) != MRAA_SUCCESS) {
syslog(LOG_ERR, "[GPIOD_INTERFACE]: init: unable to setup mux register for pin %d", pins[i]);
mraa_gpio_close(dev);
return NULL;
}
}
chip_id = board->pins[pins[i]].gpio.gpio_chip; chip_id = board->pins[pins[i]].gpio.gpio_chip;
line_offset = board->pins[pins[i]].gpio.gpio_line; line_offset = board->pins[pins[i]].gpio.gpio_line;

13
src/i2c/i2c.c
View File

@@ -156,7 +156,12 @@ mraa_i2c_init(int bus)
return NULL; return NULL;
} }
} }
if (pos >= 0 && board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_I2C) != MRAA_SUCCESS) {
syslog(LOG_ERR, "i2c%i_init: Failed to set-up i2c sda multiplex register", bus);
return NULL;
}
}
pos = board->i2c_bus[bus].scl; pos = board->i2c_bus[bus].scl;
if (pos >=0 && board->pins[pos].i2c.mux_total > 0) { if (pos >=0 && board->pins[pos].i2c.mux_total > 0) {
if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) { if (mraa_setup_mux_mapped(board->pins[pos].i2c) != MRAA_SUCCESS) {
@@ -164,6 +169,12 @@ mraa_i2c_init(int bus)
return NULL; return NULL;
} }
} }
if (pos >= 0 && board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_I2C) != MRAA_SUCCESS) {
syslog(LOG_ERR, "i2c%i_init: Failed to set-up scl sda multiplex register", bus);
return NULL;
}
}
} }
return mraa_i2c_init_internal(board->adv_func, (unsigned int) board->i2c_bus[bus].bus_id); return mraa_i2c_init_internal(board->adv_func, (unsigned int) board->i2c_bus[bus].bus_id);

7
src/pwm/pwm.c
View File

@@ -240,6 +240,13 @@ mraa_pwm_init(int pin)
} }
} }
if (board->adv_func->mux_init_reg) {
if(board->adv_func->mux_init_reg(pin, MUX_REGISTER_MODE_PWM) != MRAA_SUCCESS) {
syslog(LOG_ERR, "pwm_init: Failed to set-up pwm%i multiplex register", pin);
return NULL;
}
}
int chip = board->pins[pin].pwm.parent_id; int chip = board->pins[pin].pwm.parent_id;
int pinn = board->pins[pin].pwm.pinmap; int pinn = board->pins[pin].pwm.pinmap;

28
src/spi/spi.c
View File

@@ -81,6 +81,13 @@ mraa_spi_init(int bus)
} }
} }
if (pos >= 0 && plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi sclk multiplex register");
return NULL;
}
}
pos = plat->spi_bus[bus].mosi; pos = plat->spi_bus[bus].mosi;
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
@@ -89,6 +96,13 @@ mraa_spi_init(int bus)
} }
} }
if (pos >= 0 && plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi mosi multiplex register");
return NULL;
}
}
pos = plat->spi_bus[bus].miso; pos = plat->spi_bus[bus].miso;
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
@@ -97,6 +111,13 @@ mraa_spi_init(int bus)
} }
} }
if (pos >= 0 && plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi miso multiplex register");
return NULL;
}
}
pos = plat->spi_bus[bus].cs; pos = plat->spi_bus[bus].cs;
if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) { if (pos >= 0 && plat->pins[pos].spi.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) { if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS) {
@@ -104,6 +125,13 @@ mraa_spi_init(int bus)
return NULL; return NULL;
} }
} }
if (pos >= 0 && plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_SPI) != MRAA_SUCCESS) {
syslog(LOG_ERR, "spi: failed to set-up spi cs multiplex register");
return NULL;
}
}
} }
mraa_spi_context dev = mraa_spi_init_raw(plat->spi_bus[bus].bus_id, plat->spi_bus[bus].slave_s); mraa_spi_context dev = mraa_spi_init_raw(plat->spi_bus[bus].bus_id, plat->spi_bus[bus].slave_s);

24
src/uart/uart.c
View File

@@ -201,6 +201,12 @@ mraa_uart_init(int index)
return NULL; return NULL;
} }
} }
if (plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) {
syslog(LOG_ERR, "uart%i: init: failed to setup mux register for RX pin", index);
return NULL;
}
}
} }
pos = plat->uart_dev[index].tx; pos = plat->uart_dev[index].tx;
@@ -211,6 +217,12 @@ mraa_uart_init(int index)
return NULL; return NULL;
} }
} }
if (plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) {
syslog(LOG_ERR, "uart%i: init: failed to setup mux register for TX pin", index);
return NULL;
}
}
} }
} }
@@ -606,12 +618,24 @@ mraa_uart_set_flowcontrol(mraa_uart_context dev, mraa_boolean_t xonxoff, mraa_bo
return MRAA_ERROR_FEATURE_NOT_SUPPORTED; return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
} }
} }
if (plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos_cts, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) {
syslog(LOG_ERR, "uart%i: init: failed to setup mux register for CTS pin", dev->index);
return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
}
}
if (plat->pins[pos_rts].uart.mux_total > 0) { if (plat->pins[pos_rts].uart.mux_total > 0) {
if (mraa_setup_mux_mapped(plat->pins[pos_rts].uart) != MRAA_SUCCESS) { if (mraa_setup_mux_mapped(plat->pins[pos_rts].uart) != MRAA_SUCCESS) {
syslog(LOG_ERR, "uart%i: init: failed to setup muxes for RTS pin", dev->index); syslog(LOG_ERR, "uart%i: init: failed to setup muxes for RTS pin", dev->index);
return MRAA_ERROR_FEATURE_NOT_SUPPORTED; return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
} }
} }
if (plat->adv_func->mux_init_reg) {
if(plat->adv_func->mux_init_reg(pos_rts, MUX_REGISTER_MODE_UART) != MRAA_SUCCESS) {
syslog(LOG_ERR, "uart%i: init: failed to setup mux register for RTS pin", dev->index);
return MRAA_ERROR_FEATURE_NOT_SUPPORTED;
}
}
} }
} }
} }