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types.h: fix Radxa ROCK 3B and Radxa CM5 IO wiring

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Signed-off-by: Nascs <nascs@radxa.com>
This commit is contained in:
Nascs
2023-11-22 10:42:38 +00:00
committed by Tom Ingleby
parent ed793eb615
commit 3c288a0910
1 changed files with 51 additions and 51 deletions
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102
api/mraa/types.h
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@@ -257,31 +257,31 @@ typedef enum {
* Radxa CM5 IO GPIO numbering enum * Radxa CM5 IO GPIO numbering enum
*/ */
typedef enum { typedef enum {
RADXA_CM5_IO_PIN3 = 3, MRAA_RADXA_CM5_IO_PIN3 = 3,
RADXA_CM5_IO_PIN5 = 5, MRAA_RADXA_CM5_IO_PIN5 = 5,
RADXA_CM5_IO_PIN7 = 7, MRAA_RADXA_CM5_IO_PIN7 = 7,
RADXA_CM5_IO_PIN8 = 8, MRAA_RADXA_CM5_IO_PIN8 = 8,
RADXA_CM5_IO_PIN10 = 10, MRAA_RADXA_CM5_IO_PIN10 = 10,
RADXA_CM5_IO_PIN11 = 11, MRAA_RADXA_CM5_IO_PIN11 = 11,
RADXA_CM5_IO_PIN12 = 12, MRAA_RADXA_CM5_IO_PIN12 = 12,
RADXA_CM5_IO_PIN13 = 13, MRAA_RADXA_CM5_IO_PIN13 = 13,
RADXA_CM5_IO_PIN15 = 15, MRAA_RADXA_CM5_IO_PIN15 = 15,
RADXA_CM5_IO_PIN16 = 16, MRAA_RADXA_CM5_IO_PIN16 = 16,
RADXA_CM5_IO_PIN18 = 18, MRAA_RADXA_CM5_IO_PIN18 = 18,
RADXA_CM5_IO_PIN19 = 19, MRAA_RADXA_CM5_IO_PIN19 = 19,
RADXA_CM5_IO_PIN21 = 21, MRAA_RADXA_CM5_IO_PIN21 = 21,
RADXA_CM5_IO_PIN22 = 22, MRAA_RADXA_CM5_IO_PIN22 = 22,
RADXA_CM5_IO_PIN23 = 23, MRAA_RADXA_CM5_IO_PIN23 = 23,
RADXA_CM5_IO_PIN24 = 24, MRAA_RADXA_CM5_IO_PIN24 = 24,
RADXA_CM5_IO_PIN26 = 26, MRAA_RADXA_CM5_IO_PIN26 = 26,
RADXA_CM5_IO_PIN29 = 29, MRAA_RADXA_CM5_IO_PIN29 = 29,
RADXA_CM5_IO_PIN31 = 31, MRAA_RADXA_CM5_IO_PIN31 = 31,
RADXA_CM5_IO_PIN32 = 32, MRAA_RADXA_CM5_IO_PIN32 = 32,
RADXA_CM5_IO_PIN33 = 33, MRAA_RADXA_CM5_IO_PIN33 = 33,
RADXA_CM5_IO_PIN35 = 35, MRAA_RADXA_CM5_IO_PIN35 = 35,
RADXA_CM5_IO_PIN36 = 36, MRAA_RADXA_CM5_IO_PIN36 = 36,
RADXA_CM5_IO_PIN38 = 38, MRAA_RADXA_CM5_IO_PIN38 = 38,
RADXA_CM5_IO_PIN40 = 40 MRAA_RADXA_CM5_IO_PIN40 = 40
} mraa_radxa_cm5_io_wiring_t; } mraa_radxa_cm5_io_wiring_t;
/** /**
@@ -322,32 +322,32 @@ typedef enum {
* Radxa ROCK 3 Model B GPIO numbering enum * Radxa ROCK 3 Model B GPIO numbering enum
*/ */
typedef enum { typedef enum {
RADXA_ROCK_3B_PIN3 = 3, MRAA_RADXA_ROCK_3B_PIN3 = 3,
RADXA_ROCK_3B_PIN5 = 5, MRAA_RADXA_ROCK_3B_PIN5 = 5,
RADXA_ROCK_3B_PIN7 = 7, MRAA_RADXA_ROCK_3B_PIN7 = 7,
RADXA_ROCK_3B_PIN8 = 8, MRAA_RADXA_ROCK_3B_PIN8 = 8,
RADXA_ROCK_3B_PIN10 = 10, MRAA_RADXA_ROCK_3B_PIN10 = 10,
RADXA_ROCK_3B_PIN11 = 11, MRAA_RADXA_ROCK_3B_PIN11 = 11,
RADXA_ROCK_3B_PIN12 = 12, MRAA_RADXA_ROCK_3B_PIN12 = 12,
RADXA_ROCK_3B_PIN13 = 13, MRAA_RADXA_ROCK_3B_PIN13 = 13,
RADXA_ROCK_3B_PIN15 = 15, MRAA_RADXA_ROCK_3B_PIN15 = 15,
RADXA_ROCK_3B_PIN16 = 16, MRAA_RADXA_ROCK_3B_PIN16 = 16,
RADXA_ROCK_3B_PIN18 = 18, MRAA_RADXA_ROCK_3B_PIN18 = 18,
RADXA_ROCK_3B_PIN19 = 19, MRAA_RADXA_ROCK_3B_PIN19 = 19,
RADXA_ROCK_3B_PIN21 = 21, MRAA_RADXA_ROCK_3B_PIN21 = 21,
RADXA_ROCK_3B_PIN22 = 22, MRAA_RADXA_ROCK_3B_PIN22 = 22,
RADXA_ROCK_3B_PIN23 = 23, MRAA_RADXA_ROCK_3B_PIN23 = 23,
RADXA_ROCK_3B_PIN24 = 24, MRAA_RADXA_ROCK_3B_PIN24 = 24,
RADXA_ROCK_3B_PIN27 = 27, MRAA_RADXA_ROCK_3B_PIN27 = 27,
RADXA_ROCK_3B_PIN28 = 28, MRAA_RADXA_ROCK_3B_PIN28 = 28,
RADXA_ROCK_3B_PIN29 = 29, MRAA_RADXA_ROCK_3B_PIN29 = 29,
RADXA_ROCK_3B_PIN31 = 31, MRAA_RADXA_ROCK_3B_PIN31 = 31,
RADXA_ROCK_3B_PIN32 = 32, MRAA_RADXA_ROCK_3B_PIN32 = 32,
RADXA_ROCK_3B_PIN33 = 33, MRAA_RADXA_ROCK_3B_PIN33 = 33,
RADXA_ROCK_3B_PIN35 = 35, MRAA_RADXA_ROCK_3B_PIN35 = 35,
RADXA_ROCK_3B_PIN36 = 36, MRAA_RADXA_ROCK_3B_PIN36 = 36,
RADXA_ROCK_3B_PIN38 = 38, MRAA_RADXA_ROCK_3B_PIN38 = 38,
RADXA_ROCK_3B_PIN40 = 40 MRAA_RADXA_ROCK_3B_PIN40 = 40
} mraa_radxa_rock_3b_wiring_t; } mraa_radxa_rock_3b_wiring_t;
/** /**