diff --git a/api/mraa/types.h b/api/mraa/types.h index 12ebce2..27c489d 100644 --- a/api/mraa/types.h +++ b/api/mraa/types.h @@ -47,6 +47,7 @@ typedef enum { MRAA_BANANA = 7, /**< Allwinner A20 based Banana Pi and Banana Pro */ MRAA_INTEL_NUC5 = 8, /**< The Intel 5th generations Broadwell NUCs */ MRAA_96BOARDS = 9, /**< Linaro 96boards */ + MRAA_INTEL_SOFIA_3GR = 10, /**< The Intel SoFIA 3GR */ // USB platform extenders start at 256 MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */ diff --git a/include/x86/intel_sofia_3gr.h b/include/x86/intel_sofia_3gr.h new file mode 100644 index 0000000..163fdbb --- /dev/null +++ b/include/x86/intel_sofia_3gr.h @@ -0,0 +1,39 @@ +/* + * Author: Lay, Kuan Loon + * Copyright (c) 2015 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mraa_internal.h" + +#define MRAA_INTEL_SOFIA_3GR_PINCOUNT 8 + +mraa_board_t* mraa_intel_sofia_3gr(); + +#ifdef __cplusplus +} +#endif diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt old mode 100644 new mode 100755 index 819d2aa..ceb31e4 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -27,6 +27,7 @@ set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/intel_de3815.c ${PROJECT_SOURCE_DIR}/src/x86/intel_nuc5.c ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c + ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c ) message (INFO " - Adding support for platform ${MRAAPLATFORMFORCE}") @@ -46,6 +47,8 @@ if (NOT ${MRAAPLATFORMFORCE} STREQUAL "ALL") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_minnow_byt_compatible.c) elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_NUC5") set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_nuc5.c) + elseif (${MRAAPLATFORMFORCE} STREQUAL "MRAA_INTEL_SOFIA_3GR") + set (mraa_LIB_X86_SRCS_NOAUTO ${PROJECT_SOURCE_DIR}/src/x86/x86.c ${PROJECT_SOURCE_DIR}/src/x86/intel_sofia_3gr.c) else () message (ERROR " - Unknown x86 platform enabled!") endif () diff --git a/src/x86/intel_sofia_3gr.c b/src/x86/intel_sofia_3gr.c new file mode 100644 index 0000000..51c0253 --- /dev/null +++ b/src/x86/intel_sofia_3gr.c @@ -0,0 +1,103 @@ +/* + * Author: Lay, Kuan Loon + * Copyright (c) 2015 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include +#include +#include +#include + +#include "common.h" +#include "x86/intel_sofia_3gr.h" + +#define PLATFORM_NAME "SoFIA 3GR" + +mraa_board_t* +mraa_intel_sofia_3gr() +{ + mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); + if (b == NULL) { + return NULL; + } + + b->platform_name = PLATFORM_NAME; + b->phy_pin_count = MRAA_INTEL_SOFIA_3GR_PINCOUNT; + + b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); + if (b->adv_func == NULL) { + goto error; + } + + b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_SOFIA_3GR_PINCOUNT); + if (b->pins == NULL) { + free(b->adv_func); + goto error; + } + + strncpy(b->pins[0].name, "I2C1SCL", 8); + b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[0].i2c.pinmap = 1; + b->pins[0].i2c.mux_total = 0; + + strncpy(b->pins[1].name, "I2C1SDA", 8); + b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[1].i2c.pinmap = 1; + b->pins[1].i2c.mux_total = 0; + + strncpy(b->pins[2].name, "I2C2SCL", 8); + b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[2].i2c.pinmap = 1; + b->pins[2].i2c.mux_total = 0; + + strncpy(b->pins[3].name, "I2C2SDA", 8); + b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[3].i2c.pinmap = 1; + b->pins[3].i2c.mux_total = 0; + + strncpy(b->pins[4].name, "I2C3SCL", 8); + b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[4].i2c.pinmap = 1; + b->pins[4].i2c.mux_total = 0; + + strncpy(b->pins[5].name, "I2C3SDA", 8); + b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[5].i2c.pinmap = 1; + b->pins[5].i2c.mux_total = 0; + + strncpy(b->pins[6].name, "I2C4SCL", 8); + b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[6].i2c.pinmap = 1; + b->pins[6].i2c.mux_total = 0; + + strncpy(b->pins[7].name, "I2C4SDA", 8); + b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 1, 0, 0 }; + b->pins[7].i2c.pinmap = 1; + b->pins[7].i2c.mux_total = 0; + + return b; +error: + syslog(LOG_CRIT, "SoFIA 3GR: Platform failed to initialise"); + free(b); + return NULL; +} diff --git a/src/x86/x86.c b/src/x86/x86.c old mode 100644 new mode 100755 index 4667264..83a31b8 --- a/src/x86/x86.c +++ b/src/x86/x86.c @@ -80,8 +80,19 @@ mraa_x86_platform() free(line); } fclose(fh); + } else { + fh = fopen("/proc/cmdline", "r"); + if (fh != NULL) { + if (getline(&line, &len, fh) != -1) { + if (strstr(line, "sf3gr_mrd_version=P2.0")) { + platform_type = MRAA_INTEL_SOFIA_3GR; + plat = mraa_intel_sofia_3gr(); + } + free(line); + } + fclose(fh); + } } - return platform_type; #else #if defined(xMRAA_INTEL_GALILEO_GEN2) @@ -96,6 +107,8 @@ mraa_x86_platform() plat = mraa_intel_galileo_rev_d(); #elif defined(xMRAA_INTEL_NUC5) plat = mraa_intel_nuc5(); + #elif defined(xMRAA_INTEL_SOFIA_3GR) + plat = mraa_intel_sofia_3gr(); #else #error "Not using a valid platform value from mraa_platform_t - cannot compile" #endif