mock: added AIO pin and logic
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com> Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
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Brendan Le Foll
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docs/mock.md
12
docs/mock.md
@@ -12,17 +12,17 @@ Board configuration
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-------------------
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This feature is yet in the experimental mode and not all functionality is available.
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Right now we simulate a single generic board with only GPIO (without ISR) working.
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It also reports having an ADC with 10 (std)/12 (max) bit resolution, but the ADC
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functionality itself is not yet implemented.
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Right now we simulate a single generic board with GPIO (without ISR) and
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an ADC with 10 (std)/12 (max) bit resolution, which returns random values on read.
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We plan to develop it further and all [contributions](../CONTRIBUTING.md) are more than welcome.
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See the table below for pin layout and features
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| MRAA Number | Pin Name | Notes |
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|-------------|----------|-----------------------------|
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| 0 | GPIO0 | GPIO pin, no muxing, no ISR |
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| MRAA Number | Pin Name | Notes |
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|-------------|----------|---------------------------------------|
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| 0 | GPIO0 | GPIO pin, no muxing, no ISR |
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| 1 | ADC0 | AIO pin, returns random value on read |
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Building
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--------
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