mmap: added mmap io to gpio

* added function to gpio to use mmap
* changed board definition format around mmap io (fast-gpio)
* Intel Galileo Rev D updated to follow changed definitions

* Example performing mmap io to pin 2 added.

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>

src/gpio/gpio.c

@@ -33,6 +33,7 @@
 #include <pthread.h>
 #include <signal.h>
 #include <sys/stat.h>
+#include <sys/mman.h>
 
 #define SYSFS_CLASS_GPIO "/sys/class/gpio"
 #define MAX_SIZE 64
@@ -45,11 +46,16 @@
 struct _gpio {
     /*@{*/
     int pin; /**< the pin number, as known to the os. */
+    int phy_pin; /**< pin passed to clean init. -1 none and raw*/
     int value_fp; /**< the file pointer to the value of the gpio */
     void (* isr)(); /**< the interupt service request */
     pthread_t thread_id; /**< the isr handler thread id */
     int isr_value_fp; /**< the isr file pointer on the value */
     maa_boolean_t owner; /**< If this context originally exported the pin */
+    maa_boolean_t mmap;
+    void *reg;
+    unsigned int reg_sz;
+    unsigned int reg_bit_pos;
     /*@}*/
 };
 
@@ -73,7 +79,9 @@ maa_gpio_init(int pin)
     if (pinm < 0)
         return NULL;
 
-    return maa_gpio_init_raw(pinm);
+    maa_gpio_context r = maa_gpio_init_raw(pinm);
+    r->phy_pin = pin;
+    return r;
 }
 
 maa_gpio_context
@@ -90,12 +98,13 @@ maa_gpio_init_raw(int pin)
     dev->value_fp = -1;
     dev->isr_value_fp = -1;
     dev->pin = pin;
+    dev->phy_pin = -1;
 
     char directory[MAX_SIZE];
     snprintf(directory, MAX_SIZE, SYSFS_CLASS_GPIO "/gpio%d/", dev->pin);
     struct stat dir;
     if (stat(directory, &dir) == 0 && S_ISDIR(dir.st_mode)) {
-        fprintf(stderr, "GPIO Pin already exporting, continuing.\n");
+        //fprintf(stderr, "GPIO Pin already exporting, continuing.\n");
         dev->owner = 0; // Not Owner
     } else {
         int export = open(SYSFS_CLASS_GPIO "/export", O_WRONLY);
@@ -115,6 +124,17 @@ maa_gpio_init_raw(int pin)
     return dev;
 }
 
+static maa_result_t
+maa_gpio_write_register(maa_gpio_context dev,int value)
+{
+    if (value == 1) {
+        *((unsigned *)dev->reg) |= (1<<dev->reg_bit_pos);
+        return MAA_SUCCESS;
+    }
+    *((unsigned *)dev->reg) &= ~(1<<dev->reg_bit_pos);
+    return MAA_SUCCESS;
+}
+
 static maa_result_t
 maa_gpio_wait_interrupt(int fd)
 {
@@ -395,6 +415,9 @@ maa_gpio_read(maa_gpio_context dev)
 maa_result_t
 maa_gpio_write(maa_gpio_context dev, int value)
 {
+    if (dev->mmap == 1)
+        return maa_gpio_write_register(dev,value);
+
     if (dev->value_fp == -1) {
         maa_gpio_get_valfp(dev);
     }
@@ -461,3 +484,45 @@ maa_gpio_owner(maa_gpio_context dev, maa_boolean_t own)
     return MAA_SUCCESS;
 }
 
+maa_result_t
+maa_gpio_use_mmaped(maa_gpio_context dev, maa_boolean_t mmap_en)
+{
+    if (dev ==  NULL) {
+        return MAA_ERROR_INVALID_RESOURCE;
+    }
+
+    if (maa_pin_mode_test(dev->phy_pin, MAA_PIN_FAST_GPIO) == 0)
+        return MAA_ERROR_NO_RESOURCES;
+
+    maa_mmap_pin_t *mmp = maa_setup_mmap_gpio(dev->phy_pin);
+    if (mmp == NULL)
+        return MAA_ERROR_INVALID_RESOURCE;
+
+    if (mmap_en == 1) {
+        if (dev->mmap == 0) {
+            close(dev->value_fp);
+            int fd;
+            fd = open(mmp->mem_dev, O_RDWR);
+            if (fd < 1) {
+                fprintf(stderr, "Unable to open memory device\n");
+                return MAA_ERROR_INVALID_RESOURCE;
+            }
+            dev->reg_sz = mmp->mem_sz;
+            dev->reg = mmap(NULL, dev->reg_sz, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
+            dev->reg_bit_pos = mmp->bit_pos;
+            dev->mmap = 1;
+            return MAA_SUCCESS;
+        }
+        return MAA_ERROR_INVALID_PARAMETER;
+    }
+
+    if (mmap_en == 0) {
+        if (dev ->mmap == 1) {
+            munmap(dev->reg, dev->reg_sz);
+            dev->mmap = 0;
+        }
+        return MAA_ERROR_INVALID_PARAMETER;
+    }
+
+    return MAA_SUCCESS;
+}

src/intel_galileo_rev_d.c

@@ -62,6 +62,15 @@ maa_intel_galileo_rev_d()
     b->pins[2].gpio.mux_total = 1;
     b->pins[2].gpio.mux[0].pin = 31;
     b->pins[2].gpio.mux[0].value = 1;
+    b->pins[2].mmap.gpio.pinmap = 14;
+    strncpy(b->pins[2].mmap.mem_dev, "/dev/uio0", 12);
+    b->pins[2].mmap.gpio.mux_total = 2;
+    b->pins[2].mmap.gpio.mux[0].pin = 31;
+    b->pins[2].mmap.gpio.mux[0].value = 0;
+    b->pins[2].mmap.gpio.mux[1].pin = 14;
+    b->pins[2].mmap.gpio.mux[1].value = 0;
+    b->pins[2].mmap.mem_sz = 0x1000;
+    b->pins[2].mmap.bit_pos = 6;
 
     strncpy(b->pins[3].name, "IO3", 8);
     b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,1,0,0,0};
@@ -69,10 +78,15 @@ maa_intel_galileo_rev_d()
     b->pins[3].gpio.mux_total = 1;
     b->pins[3].gpio.mux[0].pin = 30;
     b->pins[3].gpio.mux[0].value = 1;
-    b->pins[3].fast_gpio.pinmap = 15;
-    b->pins[3].fast_gpio.mux_total = 1;
-    b->pins[3].fast_gpio.mux[0].pin = 30;
-    b->pins[3].fast_gpio.mux[0].value = 0;
+    b->pins[3].mmap.gpio.pinmap = 15;
+    strncpy(b->pins[3].mmap.mem_dev, "/dev/uio0", 12);
+    b->pins[3].mmap.gpio.mux_total = 2;
+    b->pins[3].mmap.gpio.mux[0].pin = 30;
+    b->pins[3].mmap.gpio.mux[0].value = 0;
+    b->pins[3].mmap.gpio.mux[1].pin = 15;
+    b->pins[3].mmap.gpio.mux[1].value = 0;
+    b->pins[3].mmap.mem_sz = 0x1000;
+    b->pins[3].mmap.bit_pos = 7;
     b->pins[3].pwm.pinmap = 3;
     b->pins[3].pwm.parent_id = 0;
     b->pins[3].pwm.mux_total = 1;

src/maa.c

@@ -312,3 +312,22 @@ maa_pin_mode_test(int pin, maa_pinmodes_t mode)
     }
     return 0;
 }
+
+maa_mmap_pin_t*
+maa_setup_mmap_gpio(int pin)
+{
+    if (plat == NULL)
+        return NULL;
+
+    if (plat->pins[pin].capabilites.fast_gpio != 1)
+        return NULL;
+
+    if (plat->pins[pin].mmap.gpio.mux_total > 0)
+       if (maa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MAA_SUCCESS)
+            return NULL;
+
+    if (maa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MAA_SUCCESS)
+            return NULL;
+    maa_mmap_pin_t *ret = &(plat->pins[pin].mmap);
+    return ret;
+}