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mraa_internal_types.h, aio.c, beaglebone.c:

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Beaglebone AIO pins seem to be a little different than most boards, so
this is my attempt to work with that without impacting other boards. I
added a new flag in mraa_board_t to indicate whether or not the aio pins
are sequential. One the beaglebone, they are not. To go along with this,
I added a new device mraa_aio_dev_t, that will map each aio to a
physical pin.

In the main aio logic, if aio_non_seq is true for the board, the manual
mapping is used, otherwise the old mathematical mapping is used.

Signed-off-by: Nick Crast  <nrcrast@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Nick Crast
2017-05-31 11:58:14 -04:00
committed by Brendan Le Foll
parent ff03b2de1d
commit bb3584fcdb
3 changed files with 38 additions and 9 deletions
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14
include/mraa_internal_types.h
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@@ -43,6 +43,7 @@
// Max count for various busses
#define MAX_I2C_BUS_COUNT 12
#define MAX_SPI_BUS_COUNT 12
#define MAX_AIO_COUNT 7
#define MAX_UART_COUNT 6
#define MAX_PWM_COUNT 6
@@ -386,16 +387,25 @@ typedef struct {
/*@}*/
} mraa_pwm_dev_t;
/**
* A structure representing an aio device.
*/
typedef struct {
/*@{*/
unsigned int pin; /**< Pin as exposed in the system */
/*@}*/
} mraa_aio_dev_t;
/**
* A Structure representing a platform/board.
*/
typedef struct _board_t {
/*@{*/
int phy_pin_count; /**< The Total IO pins on board */
int gpio_count; /**< GPIO Count */
int aio_count; /**< Analog side Count */
int i2c_bus_count; /**< Usable i2c Count */
unsigned int aio_non_seq; /**< Are AIO pins non sequential? Usually 0. */
mraa_i2c_bus_t i2c_bus[MAX_I2C_BUS_COUNT]; /**< Array of i2c */
unsigned int def_i2c_bus; /**< Position in array of default i2c bus */
int spi_bus_count; /**< Usable spi Count */
@@ -404,9 +414,11 @@ typedef struct _board_t {
unsigned int adc_raw; /**< ADC raw bit value */
unsigned int adc_supported; /**< ADC supported bit value */
unsigned int def_uart_dev; /**< Position in array of default uart */
unsigned int def_aio_dev; /**< Position in array of default aio */
unsigned int def_pwm_dev; /**< Position in array of default pwm */
int uart_dev_count; /**< Usable uart Count */
mraa_uart_dev_t uart_dev[MAX_UART_COUNT]; /**< Array of UARTs */
mraa_aio_dev_t aio_dev[MAX_AIO_COUNT]; /**<Array of AIOs */
mraa_boolean_t no_bus_mux; /**< i2c/spi/adc/pwm/uart bus muxing setup not required */
int pwm_dev_count; /**< Usable pwm Count */
mraa_pwm_dev_t pwm_dev[MAX_PWM_COUNT]; /**< Array of PWMs */