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x86/galileo-gen2: Speed up mraa_gpio_dir

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Made like changes to Edison to cache the output enable.

Note: different than Edison as the pin structure holds enable pin number
instead of external array.

2nd note: noticed PU resistors are also in structure but there is also
external array.

Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Kurt Eckhardt
2014-12-10 16:25:12 -08:00
committed by Brendan Le Foll
parent 455ab6f063
commit bc05ce7078
1 changed files with 27 additions and 9 deletions
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36
src/x86/intel_galileo_rev_g.c
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@@ -43,6 +43,8 @@ static unsigned int mmap_count = 0;
static unsigned int pullup_map[] = {33,29,35,17,37,19,21,39,41,23,27,25,43,31,49,51,53,55,57,59}; static unsigned int pullup_map[] = {33,29,35,17,37,19,21,39,41,23,27,25,43,31,49,51,53,55,57,59};
static mraa_gpio_context agpioOutputen[MRAA_INTEL_GALILEO_GEN_2_PINCOUNT];
mraa_result_t mraa_result_t
mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir) mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
{ {
@@ -52,21 +54,36 @@ mraa_intel_galileo_gen2_dir_pre(mraa_gpio_context dev, gpio_dir_t dir)
return MRAA_SUCCESS; return MRAA_SUCCESS;
if (plat->pins[pin].gpio.complex_cap.output_en == 1) { if (plat->pins[pin].gpio.complex_cap.output_en == 1) {
mraa_gpio_context output_e = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable); if (!agpioOutputen[pin]) {
if (output_e == NULL) { agpioOutputen[pin] = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
return MRAA_ERROR_INVALID_RESOURCE; if (agpioOutputen[pin] == NULL) {
} return MRAA_ERROR_INVALID_RESOURCE;
if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS) { }
return mraa_gpio_close(output_e); if (mraa_gpio_dir(agpioOutputen[pin], MRAA_GPIO_OUT) != MRAA_SUCCESS) {
return MRAA_ERROR_INVALID_RESOURCE;
}
} }
int output_val = 1; int output_val = 1;
if (dir == MRAA_GPIO_OUT) { if (dir == MRAA_GPIO_OUT) {
output_val = 0; output_val = 0;
} }
if (mraa_gpio_write(output_e, output_val) != MRAA_SUCCESS) { if (mraa_gpio_write(agpioOutputen[pin], output_val) != MRAA_SUCCESS) {
return mraa_gpio_close(output_e); return MRAA_ERROR_INVALID_RESOURCE;
} }
mraa_gpio_close(output_e); }
}
return MRAA_SUCCESS;
}
mraa_result_t
mraa_intel_galileo_gen2_gpio_close_pre(mraa_gpio_context dev)
{
if (dev->phy_pin >= 0) {
int pin = dev->phy_pin;
if (agpioOutputen[pin]) {
mraa_gpio_close(agpioOutputen[pin]);
agpioOutputen[pin] = NULL;
} }
} }
return MRAA_SUCCESS; return MRAA_SUCCESS;
@@ -325,6 +342,7 @@ mraa_intel_galileo_gen2()
b->pwm_max_period = 41666; b->pwm_max_period = 41666;
b->pwm_min_period = 666; b->pwm_min_period = 666;
advance_func->gpio_close_pre = &mraa_intel_galileo_gen2_gpio_close_pre;
advance_func->gpio_dir_pre = &mraa_intel_galileo_gen2_dir_pre; advance_func->gpio_dir_pre = &mraa_intel_galileo_gen2_dir_pre;
advance_func->i2c_init_pre = &mraa_intel_galileo_gen2_i2c_init_pre; advance_func->i2c_init_pre = &mraa_intel_galileo_gen2_i2c_init_pre;
advance_func->pwm_period_replace = &mraa_intel_galileo_gen2_pwm_period_replace; advance_func->pwm_period_replace = &mraa_intel_galileo_gen2_pwm_period_replace;