From c1017bb6ead0cdf3e96071824f7ab5b833aa07f2 Mon Sep 17 00:00:00 2001 From: Brendan Le Foll Date: Wed, 30 Nov 2016 11:37:47 +0100 Subject: [PATCH] intel_gt_tuchuck.c: Clear uart pin cap since bios doesn't allow muxing Signed-off-by: Brendan Le Foll --- src/x86/intel_gt_tuchuck.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/x86/intel_gt_tuchuck.c b/src/x86/intel_gt_tuchuck.c index a165db2..2a5c520 100644 --- a/src/x86/intel_gt_tuchuck.c +++ b/src/x86/intel_gt_tuchuck.c @@ -189,7 +189,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART0TX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; // not configured as GPIO //b->pins[pos].gpio.pinmap = 462; //b->pins[pos].gpio.mux_total = 0; @@ -297,7 +297,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1TX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; //b->pins[pos].gpio.pinmap = 472; //b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -313,7 +313,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1RX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 }; //b->pins[pos].gpio.pinmap = 471; //b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -554,7 +554,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART0RX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 467; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -569,7 +569,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART0RT", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 469; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -586,7 +586,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART0CT", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 412; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -603,7 +603,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1TX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 484; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -620,7 +620,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1RX", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 483; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -637,7 +637,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1RT", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 485; b->pins[pos].gpio.mux_total = 0; b->pins[pos].uart.pinmap = 0; @@ -652,7 +652,7 @@ mraa_gt_tuchuck_board() pos++; strncpy(b->pins[pos].name, "UART1CT", 8); - b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }; + b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 486; b->pins[pos].uart.pinmap = 0; b->pins[pos].uart.parent_id = 0;