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update UP board hardware details and enable ADC

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Some details regarding the UP board are not in-sync with the
final production version of the board.  This update adds an
ADC, removes a UART, and some corrections in the docs for UP.

Signed-off-by: Dan O'Donovan <dan@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Dan O'Donovan
2016-11-18 12:12:08 +00:00
committed by Brendan Le Foll
parent a0332a13b0
commit d2f1b068b7
2 changed files with 56 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
docs/up.md
View File

@@ -1,11 +1,11 @@
UP Board {#up} UP Board {#up}
============ ============
UP Board is based on the Intel(R) Atom(TM) x5-Z83xx SoC (formerly Cherry Trail). UP Board is based on the Intel(R) Atom(TM) x5-Z8350 SoC (formerly Cherry Trail).
It includes 2GB RAM, 16/32GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG port, It includes 1/2/4GB RAM, 16/32/64GB eMMC flash, 6 USB2.0 ports, 1 USB 3.0 OTG
1 Gigabit Ethernet, HDMI and DSI Graphics ports, RTC and a 40-pin I/O header. port, 1 Gigabit Ethernet, HDMI and DSI/eDP Graphics ports, RTC and a 40-pin I/O
The form-factor for the board is based on the Raspberry Pi 2, and can be used header. The form-factor for the board is based on the Raspberry Pi 2, and can be
with many of the add-on HAT boards designed for the Raspberry Pi 2. used with many of the add-on HAT boards designed for the Raspberry Pi.
Interface notes Interface notes
--------------- ---------------
@@ -25,12 +25,15 @@ granular at higher speeds. E.g. Available speeds include:
25MHz, 12.5MHz, 8.33MHz, 6.25MHz, 5MHz, 4.167MHz, 3.571MHz, 3.125MHz, etc. 25MHz, 12.5MHz, 8.33MHz, 6.25MHz, 5MHz, 4.167MHz, 3.571MHz, 3.125MHz, etc.
Please be aware that speeds in between those steps will be rounded UP to the Please be aware that speeds in between those steps will be rounded UP to the
next nearest available speed, and capped at 25MHz. next nearest available speed, and capped at 25MHz.
At the time of writing, only a single native chip-select is available (SPI CS0). 2 chip-selects are available, one natively (SPI CS0) and one by GPIO (SPI CS1).
**UART** 2 high-speed UARTs are available, supporting baud rates up to **UART** 1 high-speed UART is available, supporting baud rates between 300 and
support baud rates between 300 and 3686400. Hardware flow-control signals are 3686400. Hardware flow-control signals are available on pins 11/36 (RTS/CTS).
not exposed, so software flow-control may be needed for rates above 115200.
A console UART is also available but is not fully supported at this time. **ADC** 1 8-bit single-channel ADC (TI ADC081C021) is available on pin 7.
Please note that a kernel with UP board support is required to enable the I/O
interfaces above. Refer to https://up-community.org for more information.
Pin Mapping Pin Mapping
----------- -----------
@@ -48,13 +51,13 @@ Note that there is an enum to use wiringPi style numbers.
| 4 | P1-04 | 5V VCC | | | | 4 | P1-04 | 5V VCC | | |
| 5 | P1-05 | I2C SCL1 | 3 | I2C1 (/dev/i2c-1) | | 5 | P1-05 | I2C SCL1 | 3 | I2C1 (/dev/i2c-1) |
| 6 | P1-06 | GND | | | | 6 | P1-06 | GND | | |
| 7 | P1-07 | GPIO(4) | 4 | | | 7 | P1-07 | GPIO(4) | 4 | ADC0 (iio:device0) |
| 8 | P1-08 | UART TX1 | 14 | UART1 (/dev/ttyS1) | | 8 | P1-08 | UART TX1 | 14 | UART1 (/dev/ttyS1) |
| 9 | P1-09 | GND | | | | 9 | P1-09 | GND | | |
| 10 | P1-10 | UART RX1 | 15 | UART1 (/dev/ttyS1) | | 10 | P1-10 | UART RX1 | 15 | UART1 (/dev/ttyS1) |
| 11 | P1-11 | GPIO(17) | 17 | | | 11 | P1-11 | GPIO(17) | 17 | |
| 12 | P1-12 | I2S CLK | 18 | I2S0 (PCM Audio) | | 12 | P1-12 | I2S CLK | 18 | I2S0 (PCM Audio) |
| 13 | P1-13 | UART RX2 | 27 | UART2 (/dev/ttyS2) | | 13 | P1-13 | GPIO(27) | 27 | |
| 14 | P1-14 | GND | | | | 14 | P1-14 | GND | | |
| 15 | P1-15 | GPIO(22) | 22 | | | 15 | P1-15 | GPIO(22) | 22 | |
| 16 | P1-16 | GPIO(23) | 23 | | | 16 | P1-16 | GPIO(23) | 23 | |
@@ -63,7 +66,7 @@ Note that there is an enum to use wiringPi style numbers.
| 19 | P1-19 | SPI MOSI | 10 | SPI2 (/dev/spidev2.x)| | 19 | P1-19 | SPI MOSI | 10 | SPI2 (/dev/spidev2.x)|
| 20 | P1-20 | GND | | | | 20 | P1-20 | GND | | |
| 21 | P1-21 | SPI MISO | 9 | SPI2 (/dev/spidev2.x)| | 21 | P1-21 | SPI MISO | 9 | SPI2 (/dev/spidev2.x)|
| 22 | P1-22 | UART TX2 | 25 | UART2 (/dev/ttyS2) | | 22 | P1-22 | GPIO(25) | 25 | |
| 23 | P1-23 | SPI SCL | 11 | SPI2 (/dev/spidev2.x)| | 23 | P1-23 | SPI SCL | 11 | SPI2 (/dev/spidev2.x)|
| 24 | P1-24 | SPI CS0 | 8 | SPI2 (/dev/spidev2.0)| | 24 | P1-24 | SPI CS0 | 8 | SPI2 (/dev/spidev2.0)|
| 25 | P1-25 | GND | | | | 25 | P1-25 | GND | | |

48
src/x86/up.c
View File

@@ -62,6 +62,13 @@ set_pininfo(mraa_board_t* board, int mraa_index, char* name, mraa_pincapabilitie
if (caps.spi) { if (caps.spi) {
pin_info->spi.mux_total = 0; pin_info->spi.mux_total = 0;
} }
if (caps.aio) {
pin_info->aio.mux_total = 0;
pin_info->aio.pinmap = 0;
}
if (caps.uart) {
pin_info->uart.mux_total = 0;
}
return MRAA_SUCCESS; return MRAA_SUCCESS;
} }
return MRAA_ERROR_INVALID_RESOURCE; return MRAA_ERROR_INVALID_RESOURCE;
@@ -80,6 +87,28 @@ get_pin_index(mraa_board_t* board, char* name, int* pin_index)
return MRAA_ERROR_INVALID_RESOURCE; return MRAA_ERROR_INVALID_RESOURCE;
} }
static mraa_result_t
aio_get_valid_fp(mraa_aio_context dev)
{
char file_path[64] = "";
/*
* Open file Analog device input channel raw voltage file for reading.
*
* The UP ADC has only 1 channel, so the channel number is not included
* in the filename
*/
snprintf(file_path, 64, "/sys/bus/iio/devices/iio:device0/in_voltage_raw");
dev->adc_in_fp = open(file_path, O_RDONLY);
if (dev->adc_in_fp == -1) {
syslog(LOG_ERR, "aio: Failed to open input raw file %s for reading!", file_path);
return MRAA_ERROR_INVALID_RESOURCE;
}
return MRAA_SUCCESS;
}
mraa_board_t* mraa_board_t*
mraa_up_board() mraa_up_board()
{ {
@@ -107,6 +136,8 @@ mraa_up_board()
goto error; goto error;
} }
b->adv_func->aio_get_valid_fp = &aio_get_valid_fp;
if (uname(&running_uname) != 0) { if (uname(&running_uname) != 0) {
free(b->pins); free(b->pins);
free(b->adv_func); free(b->adv_func);
@@ -122,13 +153,13 @@ mraa_up_board()
set_pininfo(b, 4, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 4, "5v", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 5, "I2C1_SCL", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 3); set_pininfo(b, 5, "I2C1_SCL", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 3);
set_pininfo(b, 6, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 6, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 7, "GPIO4", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 4); set_pininfo(b, 7, "ADC0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 }, 4);
set_pininfo(b, 8, "UART1_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 14); set_pininfo(b, 8, "UART1_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 14);
set_pininfo(b, 9, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 9, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 10, "UART1_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 15); set_pininfo(b, 10, "UART1_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 15);
set_pininfo(b, 11, "GPIO17", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 17); set_pininfo(b, 11, "GPIO17", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 17);
set_pininfo(b, 12, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 18); set_pininfo(b, 12, "I2S_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 18);
set_pininfo(b, 13, "UART2_RX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 1 }, 27); set_pininfo(b, 13, "GPIO27", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 27);
set_pininfo(b, 14, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 14, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 15, "GPIO22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 22); set_pininfo(b, 15, "GPIO22", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 0, 0 }, 22);
set_pininfo(b, 16, "GPIO23", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 23); set_pininfo(b, 16, "GPIO23", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 23);
@@ -137,7 +168,7 @@ mraa_up_board()
set_pininfo(b, 19, "SPI_MOSI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 10); set_pininfo(b, 19, "SPI_MOSI", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 10);
set_pininfo(b, 20, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 20, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
set_pininfo(b, 21, "SPI_MISO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 9); set_pininfo(b, 21, "SPI_MISO", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 9);
set_pininfo(b, 22, "UART2_TX", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 }, 25); set_pininfo(b, 22, "GPIO25", (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }, 25);
set_pininfo(b, 23, "SPI_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 11); set_pininfo(b, 23, "SPI_CLK", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 11);
set_pininfo(b, 24, "SPI_CS0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 8); set_pininfo(b, 24, "SPI_CS0", (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 }, 8);
set_pininfo(b, 25, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1); set_pininfo(b, 25, "GND", (mraa_pincapabilities_t){ 0, 0, 0, 0, 0, 0, 0, 0 }, -1);
@@ -196,15 +227,16 @@ mraa_up_board()
get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[1].sclk)); get_pin_index(b, "SPI_CLK", (int*) &(b->spi_bus[1].sclk));
// Configure UART #1 (default) // Configure UART #1 (default)
b->uart_dev_count = 2; b->uart_dev_count = 1;
get_pin_index(b, "UART1_RX", &(b->uart_dev[0].rx)); get_pin_index(b, "UART1_RX", &(b->uart_dev[0].rx));
get_pin_index(b, "UART1_TX", &(b->uart_dev[0].tx)); get_pin_index(b, "UART1_TX", &(b->uart_dev[0].tx));
b->uart_dev[0].device_path = "/dev/ttyS1"; b->uart_dev[0].device_path = "/dev/ttyS1";
b->def_uart_dev = 0; b->def_uart_dev = 0;
// Configure UART #2
get_pin_index(b, "UART2_RX", &(b->uart_dev[1].rx)); // Configure ADC #0
get_pin_index(b, "UART2_TX", &(b->uart_dev[1].tx)); b->aio_count = 1;
b->uart_dev[1].device_path = "/dev/ttyS2"; b->adc_raw = 8;
b->adc_supported = 8;
return b; return b;
error: error: