aio: added configuration within platform data.
* Allows for different bit shifting for each platform. * New functions added for obtaining this information * mraa_adc_raw_bits * mraa_adc_supported_bits * Update board information to include this. AIO module changed to allow * use of the new board data Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
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@@ -44,9 +44,6 @@ extern "C" {
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#include "common.h"
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#include "gpio.h"
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#define ADC_RAW_RESOLUTION_BITS (12)
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#define ADC_SUPPORTED_RESOLUTION_BITS (10)
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/**
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* Opaque pointer definition to the internal struct _aio. This context refers
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* to one single AIO pin on the board.
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@@ -164,6 +164,8 @@ typedef struct {
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unsigned int spi_bus_count; /**< Usable spi Count */
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mraa_spi_bus_t spi_bus[6]; /**< Array of spi */
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unsigned int def_spi_bus; /**< Position in array of defult spi bus */
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unsigned int adc_raw; /**< ADC raw bit value */
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unsigned int adc_supported; /**< ADC supported bit value */
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mraa_pininfo_t* pins; /**< Pointer to pin array */
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/*@}*/
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} mraa_board_t;
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@@ -193,6 +195,20 @@ mraa_result_t mraa_init();
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*/
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mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
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/**
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* Check the board's bit size when reading the value
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*
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* @return raw bits being read from kernel module. zero if no ADC
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*/
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unsigned int mraa_adc_raw_bits();
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/**
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* Return value that the raw value should be shifted to. Zero if no ADC
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*
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* @return return actual bit size the adc value should be understood as.
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*/
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unsigned int mraa_adc_supported_bits();
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#ifdef __cplusplus
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}
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#endif
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