aio: added configuration within platform data.

* Allows for different bit shifting for each platform.
* New functions added for obtaining this information
* mraa_adc_raw_bits
* mraa_adc_supported_bits

* Update board information to include this. AIO module changed to allow
* use of the new board data

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>

api/mraa/aio.h

@@ -44,9 +44,6 @@ extern "C" {
 #include "common.h"
 #include "gpio.h"
 
-#define ADC_RAW_RESOLUTION_BITS         (12)
-#define ADC_SUPPORTED_RESOLUTION_BITS   (10)
-
 /**
  * Opaque pointer definition to the internal struct _aio. This context refers
  * to one single AIO pin on the board.

api/mraa/common.h

@@ -164,6 +164,8 @@ typedef struct {
     unsigned int spi_bus_count; /**< Usable spi Count */
     mraa_spi_bus_t spi_bus[6];       /**< Array of spi */
     unsigned int def_spi_bus; /**< Position in array of defult spi bus */
+    unsigned int adc_raw; /**< ADC raw bit value */
+    unsigned int adc_supported; /**< ADC supported bit value */
     mraa_pininfo_t* pins;     /**< Pointer to pin array */
     /*@}*/
 } mraa_board_t;
@@ -193,6 +195,20 @@ mraa_result_t mraa_init();
  */
 mraa_boolean_t mraa_pin_mode_test(int pin, mraa_pinmodes_t mode);
 
+/**
+ * Check the board's  bit size when reading the value
+ *
+ * @return raw bits being read from kernel module. zero if no ADC
+ */
+unsigned int mraa_adc_raw_bits();
+
+/**
+ * Return value that the raw value should be shifted to. Zero if no ADC
+ *
+ * @return return actual bit size the adc value should be understood as.
+ */
+unsigned int mraa_adc_supported_bits();
+
 #ifdef __cplusplus
 }
 #endif

src/aio/aio.c

@@ -34,6 +34,9 @@ struct _aio {
     int adc_in_fp;
 };
 
+static int raw_bits;
+static int sup_bits;
+
 static mraa_result_t aio_get_valid_fp(mraa_aio_context dev)
 {
     char file_path[64]= "";
@@ -92,6 +95,8 @@ mraa_aio_context mraa_aio_init(unsigned int aio_channel)
         free(dev);
         return NULL;
     }
+    raw_bits = mraa_adc_raw_bits();
+    sup_bits = mraa_adc_supported_bits();
 
     return dev;
 }
@@ -132,12 +137,14 @@ uint16_t mraa_aio_read(mraa_aio_context dev)
     }
 
     /* Adjust the raw analog input reading to supported resolution value*/
-    if (ADC_RAW_RESOLUTION_BITS > ADC_SUPPORTED_RESOLUTION_BITS) {
+    if (raw_bits =! sup_bits) {
-        shifter_value = ADC_RAW_RESOLUTION_BITS - ADC_SUPPORTED_RESOLUTION_BITS;
+        if (raw_bits > sup_bits) {
-        analog_value =  analog_value >> shifter_value;
+            shifter_value = raw_bits - sup_bits;
-    } else {
+            analog_value =  analog_value >> shifter_value;
-        shifter_value = ADC_SUPPORTED_RESOLUTION_BITS - ADC_RAW_RESOLUTION_BITS;
+        } else {
-        analog_value = analog_value << shifter_value;
+            shifter_value = sup_bits - raw_bits;
+            analog_value = analog_value << shifter_value;
+        }
     }
 
     return analog_value;

src/intel_galileo_rev_d.c

@@ -38,6 +38,8 @@ mraa_intel_galileo_rev_d()
     b->phy_pin_count = 20;
     b->gpio_count = 14;
     b->aio_count = 6;
+    b->adc_raw = 12;
+    b->adc_supported = 10;
 
     b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_REV_D_PINCOUNT);
 

src/intel_galileo_rev_g.c

@@ -39,6 +39,8 @@ mraa_intel_galileo_gen2()
     b->phy_pin_count = 20;
     b->gpio_count = 14;
     b->aio_count = 6;
+    b->adc_raw = 12;
+    b->adc_supported = 10;
 
     b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
 

src/mraa.c

@@ -419,3 +419,27 @@ mraa_platform_t mraa_get_platform_type()
 {
     return platform_type;
 }
+
+unsigned int
+mraa_adc_raw_bits()
+{
+    if (plat == NULL)
+        return 0;
+
+    if (plat->aio_count == 0)
+        return 0;
+
+    return plat->adc_raw;
+}
+
+unsigned int
+mraa_adc_supported_bits()
+{
+    if (plat == NULL)
+        return 0;
+
+    if (plat->aio_count == 0)
+        return 0;
+
+    return plat->adc_supported;
+}