From fa1e81380b3d70ef4291d61ed0d30075668e320c Mon Sep 17 00:00:00 2001 From: Brendan Le Foll Date: Mon, 16 Jun 2014 18:45:43 +0100 Subject: [PATCH 1/9] intel_galileo_rev_d.c: change magic number to macro in header Signed-off-by: Brendan Le Foll --- src/intel_galileo_rev_d.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel_galileo_rev_d.c b/src/intel_galileo_rev_d.c index 67aaaae..effff42 100644 --- a/src/intel_galileo_rev_d.c +++ b/src/intel_galileo_rev_d.c @@ -26,6 +26,7 @@ #include #include "common.h" +#include "intel_galileo_rev_d.h" maa_board_t* maa_intel_galileo_rev_d() @@ -38,7 +39,7 @@ maa_intel_galileo_rev_d() b->gpio_count = 14; b->aio_count = 6; - b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*25); + b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_REV_D_PINCOUNT); //GPIO IO0 - IO10 strncpy(b->pins[0].name, "IO0", 8); From 27624289ecb4e4d7f7cecb923c283234b8086dd2 Mon Sep 17 00:00:00 2001 From: Brendan Le Foll Date: Mon, 16 Jun 2014 18:45:59 +0100 Subject: [PATCH 2/9] gen2: add basic galileo gen2 detection Signed-off-by: Brendan Le Foll --- api/maa/common.h | 10 ++++++ include/intel_galileo_gen2.h | 30 ++++++++++++++++++ src/CMakeLists.txt | 1 + src/intel_galileo_gen2.c | 61 ++++++++++++++++++++++++++++++++++++ src/maa.c | 29 ++++++++++++++++- 5 files changed, 130 insertions(+), 1 deletion(-) create mode 100644 include/intel_galileo_gen2.h create mode 100644 src/intel_galileo_gen2.c diff --git a/api/maa/common.h b/api/maa/common.h index 19ba2d3..2897498 100644 --- a/api/maa/common.h +++ b/api/maa/common.h @@ -33,6 +33,16 @@ extern "C" { #endif +/** + * MAA supported platform types + */ +typedef enum { + MAA_INTEL_GALILEO_GEN1 = 0, /**< The Generation 1 Galileo platform (RevD) */ + MAA_INTEL_GALILEO_GEN2 = 1, /**< The Generation 2 Galileo platform (RevG/H) */ + + MAA_UNKNOWN_PLATFORM = 99 /**< An unknown platform type, typically will load INTEL_GALILEO_GEN1 */ +} maa_platform_t; + /** * MAA return codes */ diff --git a/include/intel_galileo_gen2.h b/include/intel_galileo_gen2.h new file mode 100644 index 0000000..03cee51 --- /dev/null +++ b/include/intel_galileo_gen2.h @@ -0,0 +1,30 @@ +/* + * Author: Brendan Le Foll + * Copyright (c) 2014 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#pragma once + +#define MAA_INTEL_GALILEO_GEN_2_PINCOUNT 25 + +maa_board_t* +maa_intel_galileo_gen2(); diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 366e1ce..8736bda 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -13,6 +13,7 @@ set (maa_LIB_SRCS ${PROJECT_SOURCE_DIR}/src/spi/spi.c ${PROJECT_SOURCE_DIR}/src/aio/aio.c ${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_d.c + ${PROJECT_SOURCE_DIR}/src/intel_galileo_gen2.c # autogenerated version file ${CMAKE_CURRENT_BINARY_DIR}/version.c ) diff --git a/src/intel_galileo_gen2.c b/src/intel_galileo_gen2.c new file mode 100644 index 0000000..7aa4a44 --- /dev/null +++ b/src/intel_galileo_gen2.c @@ -0,0 +1,61 @@ +/* + * Author: Brendan Le Foll + * Copyright (c) 2014 Intel Corporation. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + */ + +#include +#include + +#include "common.h" +#include "intel_galileo_gen2.h" + +maa_board_t* +maa_intel_galileo_gen2() +{ + maa_board_t* b = (maa_board_t*) malloc(sizeof(maa_board_t)); + if (b == NULL) + return NULL; + + b->phy_pin_count = 20; + b->gpio_count = 14; + b->aio_count = 6; + + b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_GEN_2_PINCOUNT); + + //BUS DEFINITIONS + b->i2c_bus_count = 1; + b->def_i2c_bus = 0; + b->i2c_bus[0].bus_id = 0; + b->i2c_bus[0].sda = 18; + b->i2c_bus[0].scl = 19; + + b->spi_bus_count = 1; + b->def_spi_bus = 0; + b->spi_bus[0].bus_id = 1; + b->spi_bus[0].slave_s = 0; + b->spi_bus[0].cs = 10; + b->spi_bus[0].mosi = 11; + b->spi_bus[0].miso = 12; + b->spi_bus[0].sclk = 13; + + return b; +} diff --git a/src/maa.c b/src/maa.c index 609bbd7..8c9a106 100644 --- a/src/maa.c +++ b/src/maa.c @@ -30,6 +30,7 @@ #include "maa_internal.h" #include "intel_galileo_rev_d.h" +#include "intel_galileo_gen2.h" #include "gpio.h" #include "version.h" @@ -62,7 +63,33 @@ maa_init() Py_InitializeEx(0); PyEval_InitThreads(); #endif - plat = maa_intel_galileo_rev_d(); + maa_platform_t platform_type = MAA_UNKNOWN_PLATFORM; + + // detect a galileo gen2 board + char *line = NULL; + // let getline allocate memory for *line + size_t len = 0; + FILE *fh = fopen("/sys/devices/virtual/dmi/id/board_name", "r"); + if (fh != NULL) { + if (getline(&line, &len, fh) != -1) { + if (strncmp(line, "GalileoGen2", 10) == 0) { + platform_type = MAA_INTEL_GALILEO_GEN2; + } else { + platform_type = MAA_INTEL_GALILEO_GEN1; + } + } + } + free(line); + fclose(fh); + + switch(platform_type) { + case MAA_INTEL_GALILEO_GEN2: + plat = maa_intel_galileo_gen2(); + break; + default: + plat = maa_intel_galileo_rev_d(); + } + return MAA_SUCCESS; } From ea88358164fddbe3206aaa192ad4270688d9a339 Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Tue, 17 Jun 2014 09:42:55 +0100 Subject: [PATCH 3/9] intel galile rev g: change name from gen2 to revg Signed-off-by: Thomas Ingleby --- include/{intel_galileo_gen2.h => intel_galileo_rev_g.h} | 0 src/CMakeLists.txt | 2 +- src/{intel_galileo_gen2.c => intel_galileo_rev_g.c} | 3 ++- src/maa.c | 2 +- 4 files changed, 4 insertions(+), 3 deletions(-) rename include/{intel_galileo_gen2.h => intel_galileo_rev_g.h} (100%) rename src/{intel_galileo_gen2.c => intel_galileo_rev_g.c} (95%) diff --git a/include/intel_galileo_gen2.h b/include/intel_galileo_rev_g.h similarity index 100% rename from include/intel_galileo_gen2.h rename to include/intel_galileo_rev_g.h diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt index 8736bda..4197f23 100644 --- a/src/CMakeLists.txt +++ b/src/CMakeLists.txt @@ -13,7 +13,7 @@ set (maa_LIB_SRCS ${PROJECT_SOURCE_DIR}/src/spi/spi.c ${PROJECT_SOURCE_DIR}/src/aio/aio.c ${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_d.c - ${PROJECT_SOURCE_DIR}/src/intel_galileo_gen2.c + ${PROJECT_SOURCE_DIR}/src/intel_galileo_rev_g.c # autogenerated version file ${CMAKE_CURRENT_BINARY_DIR}/version.c ) diff --git a/src/intel_galileo_gen2.c b/src/intel_galileo_rev_g.c similarity index 95% rename from src/intel_galileo_gen2.c rename to src/intel_galileo_rev_g.c index 7aa4a44..1c965a8 100644 --- a/src/intel_galileo_gen2.c +++ b/src/intel_galileo_rev_g.c @@ -1,5 +1,6 @@ /* * Author: Brendan Le Foll + * Author: Thomas Ingleby * Copyright (c) 2014 Intel Corporation. * * Permission is hereby granted, free of charge, to any person obtaining @@ -26,7 +27,7 @@ #include #include "common.h" -#include "intel_galileo_gen2.h" +#include "intel_galileo_rev_g.h" maa_board_t* maa_intel_galileo_gen2() diff --git a/src/maa.c b/src/maa.c index 8c9a106..7cbfa3f 100644 --- a/src/maa.c +++ b/src/maa.c @@ -30,7 +30,7 @@ #include "maa_internal.h" #include "intel_galileo_rev_d.h" -#include "intel_galileo_gen2.h" +#include "intel_galileo_rev_g.h" #include "gpio.h" #include "version.h" From fa4a30239877f88f8bf4b7df9c6e5e0210f44374 Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Tue, 17 Jun 2014 20:15:36 +0100 Subject: [PATCH 4/9] maa: add support for enabling pins and pulldowns * Not Complete Signed-off-by: Thomas Ingleby --- api/maa/common.h | 14 +++++++++++--- include/maa_internal.h | 7 +++++++ src/gpio/gpio.c | 8 ++++++++ src/maa.c | 44 +++++++++++++++++++++++++++++++++++++++++- 4 files changed, 69 insertions(+), 4 deletions(-) diff --git a/api/maa/common.h b/api/maa/common.h index 2897498..78178c6 100644 --- a/api/maa/common.h +++ b/api/maa/common.h @@ -108,15 +108,23 @@ typedef struct { /*@}*/ } maa_mux_t; -/** - * A Strucutre representing a singular I/O pin. i.e GPIO/PWM - */ +typedef struct { + maa_boolean_t complex_pin:1; + maa_boolean_t output_en:1; + maa_boolean_t output_en_high:1; + maa_boolean_t pullup_en:1; + maa_boolean_t pullup_en_hiz:1; +} maa_pin_cap_complex_t; + typedef struct { /*@{*/ unsigned int pinmap; /**< sysfs pin */ unsigned int parent_id; /** parent chip id */ unsigned int mux_total; /** Numfer of muxes needed for operation of pin */ maa_mux_t mux[6]; /** Array holding information about mux */ + unsigned int output_enable; /** Output Enable GPIO, for level shifting */ + unsigned int pullup_enable; /** Pull-Up enable GPIO, inputs */ + maa_pin_cap_complex_t complex_cap; /*@}*/ } maa_pin_t; diff --git a/include/maa_internal.h b/include/maa_internal.h index 520f9ee..7daf779 100644 --- a/include/maa_internal.h +++ b/include/maa_internal.h @@ -69,3 +69,10 @@ maa_pin_t* maa_setup_pwm(int pin); * @return maa_mmap_pin_t */ maa_mmap_pin_t* maa_setup_mmap_gpio(int pin); + +/** Swap Directional mode. + * + * @param pin physical pin to operate on + * @return out direction to setup. 1 for output 0 for input + */ +maa_result_t maa_swap_complex_gpio(int pin, int out); diff --git a/src/gpio/gpio.c b/src/gpio/gpio.c index 6ee7448..0b12d8c 100644 --- a/src/gpio/gpio.c +++ b/src/gpio/gpio.c @@ -368,9 +368,11 @@ maa_gpio_dir(maa_gpio_context dev, gpio_dir_t dir) char bu[MAX_SIZE]; int length; + int out_switch = 0; switch(dir) { case MAA_GPIO_OUT: length = snprintf(bu, sizeof(bu), "out"); + out_switch = 1; break; case MAA_GPIO_IN: length = snprintf(bu, sizeof(bu), "in"); @@ -380,6 +382,12 @@ maa_gpio_dir(maa_gpio_context dev, gpio_dir_t dir) return MAA_ERROR_FEATURE_NOT_IMPLEMENTED; } + if (dev->phy_pin >= 0) { + maa_result_t swap_res = maa_swap_complex_gpio(dev->phy_pin, out_switch); + if (swap_res != MAA_SUCCESS) + return swap_res; + } + if (write(direction, bu, length*sizeof(char)) == -1) { fprintf(stderr, "Failed to write to direction\n"); close(direction); diff --git a/src/maa.c b/src/maa.c index 7cbfa3f..bfb137e 100644 --- a/src/maa.c +++ b/src/maa.c @@ -36,6 +36,7 @@ //static maa_pininfo_t* pindata; static maa_board_t* plat = NULL; +static maa_platform_t platform_type = 99; const char * maa_get_version() @@ -63,7 +64,7 @@ maa_init() Py_InitializeEx(0); PyEval_InitThreads(); #endif - maa_platform_t platform_type = MAA_UNKNOWN_PLATFORM; + platform_type = MAA_UNKNOWN_PLATFORM; // detect a galileo gen2 board char *line = NULL; @@ -375,3 +376,44 @@ maa_setup_mmap_gpio(int pin) maa_mmap_pin_t *ret = &(plat->pins[pin].mmap); return ret; } + +maa_result_t +maa_swap_complex_gpio(int pin, int out) +{ + if (plat == NULL) + return MAA_ERROR_INVALID_PLATFORM; + + printf("SWAP CALLED on %i with bool as %i", pin,out); + + switch (platform_type) { + case MAA_INTEL_GALILEO_GEN2: + printf("Intel Galileo Gen 2\n"); + if (plat->pins[pin].gpio.complex_cap.complex_pin != 1) + return MAA_SUCCESS; + if (plat->pins[pin].gpio.complex_cap.output_en == 1) { + maa_gpio_context output_e; + printf("Doing stuff here with %i", plat->pins[pin].gpio.output_enable); + output_e = maa_gpio_init_raw(plat->pins[pin].gpio.output_enable); + if (maa_gpio_dir(output_e, MAA_GPIO_OUT) != MAA_SUCCESS) + return MAA_ERROR_INVALID_RESOURCE; + int output_val; + if (plat->pins[pin].gpio.complex_cap.output_en_high == 1) + output_val = out; + else + if (out == 1) + output_val = 0; + else + output_val = 1; + if (maa_gpio_write(output_e, output_val) != MAA_SUCCESS) + return MAA_ERROR_INVALID_RESOURCE; + } + //if (plat->pins[pin].gpio.complex_cap.pullup_en == 1) { + // maa_gpio_context pullup_e; + // pullup_e = maa_gpio_init_raw(plat->pins[pin].gpio.pullup_enable); + // if (maa_gpio_mode(pullup_e, MAA_GPIO_HIZ) != MAA_SUCCESS) + // return MAA_ERROR_INVALID_RESOURCE; + //} + break; + default: return MAA_SUCCESS; + } +} From 4c9b7a2208ae9b22c387f12204c85fa3c312bdf0 Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Tue, 17 Jun 2014 20:16:03 +0100 Subject: [PATCH 5/9] intel_galileo_rev_g: Complete initial pinmap Signed-off-by: Thomas Ingleby --- src/intel_galileo_rev_g.c | 255 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 255 insertions(+) diff --git a/src/intel_galileo_rev_g.c b/src/intel_galileo_rev_g.c index 1c965a8..eecb2aa 100644 --- a/src/intel_galileo_rev_g.c +++ b/src/intel_galileo_rev_g.c @@ -42,6 +42,261 @@ maa_intel_galileo_gen2() b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_GEN_2_PINCOUNT); + strncpy(b->pins[0].name, "IO0", 8); + b->pins[0].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[0].gpio.pinmap = 11; + b->pins[0].gpio.parent_id = 0; + b->pins[0].gpio.mux_total = 0; + b->pins[0].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[0].gpio.output_enable = 32; + b->pins[0].gpio.pullup_enable = 33; + + strncpy(b->pins[1].name, "IO1", 8); + b->pins[1].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[1].gpio.pinmap = 12; + b->pins[1].gpio.parent_id = 0; + b->pins[1].gpio.mux_total = 1; + b->pins[1].gpio.mux[0].pin = 45; + b->pins[1].gpio.mux[0].value = 0; + b->pins[1].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[1].gpio.output_enable = 28; + b->pins[1].gpio.pullup_enable = 29; + + strncpy(b->pins[2].name, "IO2", 8); + b->pins[2].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[2].gpio.pinmap = 13; + b->pins[2].gpio.parent_id = 0; + b->pins[2].gpio.mux_total = 1; + b->pins[2].gpio.mux[0].pin = 77; + b->pins[2].gpio.mux[0].value = 0; + b->pins[2].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[2].gpio.output_enable = 34; + b->pins[2].gpio.pullup_enable = 35; + + strncpy(b->pins[3].name, "IO3", 8); + b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[3].gpio.pinmap = 14; + b->pins[3].gpio.parent_id = 0; + b->pins[3].gpio.mux_total = 2; + b->pins[3].gpio.mux[0].pin = 76; + b->pins[3].gpio.mux[0].value = 0; + b->pins[3].gpio.mux[1].pin = 64; + b->pins[3].gpio.mux[1].value = 0; + b->pins[3].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[3].gpio.output_enable = 16; + b->pins[3].gpio.pullup_enable = 17; + b->pins[3].pwm.pinmap = 1; + b->pins[3].pwm.parent_id = 0; + b->pins[3].pwm.mux_total = 2; + b->pins[3].pwm.mux[0].pin = 76; + b->pins[3].pwm.mux[0].value = 0; + b->pins[3].pwm.mux[1].pin = 64; + b->pins[3].pwm.mux[1].value = 1; + //ADD Othher Bits? + + strncpy(b->pins[4].name, "IO4", 8); + b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[4].gpio.pinmap = 6; + b->pins[4].gpio.parent_id = 0; + b->pins[4].gpio.mux_total = 0; + b->pins[4].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[4].gpio.output_enable = 36; + b->pins[4].gpio.pullup_enable = 37; + + strncpy(b->pins[5].name, "IO5", 8); + b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[5].gpio.pinmap = 0; + b->pins[5].gpio.parent_id = 0; + b->pins[5].gpio.mux_total = 1; + b->pins[5].gpio.mux[0].pin = 66; + b->pins[5].gpio.mux[0].value = 0; + b->pins[5].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[5].gpio.output_enable = 18; + b->pins[5].gpio.pullup_enable = 19; + b->pins[5].pwm.pinmap = 3; + b->pins[5].pwm.parent_id = 0; + b->pins[5].pwm.mux_total = 1; + b->pins[5].pwm.mux[0].pin = 66; + b->pins[5].pwm.mux[0].value = 1; + + strncpy(b->pins[6].name, "IO6", 8); + b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[6].gpio.pinmap = 1; + b->pins[6].gpio.parent_id = 0; + b->pins[6].gpio.mux_total = 1; + b->pins[6].gpio.mux[0].pin = 68; + b->pins[6].gpio.mux[0].value = 0; + b->pins[6].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[6].gpio.output_enable = 20; + b->pins[6].gpio.pullup_enable = 21; + b->pins[6].pwm.pinmap = 5; + b->pins[6].pwm.parent_id = 0; + b->pins[6].pwm.mux_total = 1; + b->pins[6].pwm.mux[0].pin = 68; + b->pins[6].pwm.mux[0].value = 1; + + strncpy(b->pins[7].name, "IO7", 8); + b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[7].gpio.pinmap = 38; + b->pins[7].gpio.parent_id = 0; + b->pins[7].gpio.mux_total = 0; + b->pins[7].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[7].gpio.pullup_enable = 39; + + strncpy(b->pins[8].name, "IO8", 8); + b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; + b->pins[8].gpio.pinmap = 40; + b->pins[8].gpio.parent_id = 0; + b->pins[8].gpio.mux_total = 0; + b->pins[8].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[8].gpio.pullup_enable = 41; + + strncpy(b->pins[9].name, "IO9", 8); + b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[9].gpio.pinmap = 4; + b->pins[9].gpio.parent_id = 0; + b->pins[9].gpio.mux_total = 1; + b->pins[9].gpio.mux[0].pin = 70; + b->pins[9].gpio.mux[0].value = 0; + b->pins[9].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[9].gpio.output_enable = 22; + b->pins[9].gpio.pullup_enable = 23; + b->pins[9].pwm.pinmap = 7; + b->pins[9].pwm.parent_id = 0; + b->pins[9].pwm.mux_total = 1; + b->pins[9].pwm.mux[0].pin = 70; + b->pins[9].pwm.mux[0].value = 1; + + strncpy(b->pins[10].name, "IO10", 8); + b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; + b->pins[10].gpio.pinmap = 10; + b->pins[10].gpio.parent_id = 0; + b->pins[10].gpio.mux_total = 1; + b->pins[10].gpio.mux[0].pin = 74; + b->pins[10].gpio.mux[0].value = 0; + b->pins[10].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[10].gpio.output_enable = 26; + b->pins[10].gpio.pullup_enable = 27; + b->pins[10].pwm.pinmap = 11; + b->pins[10].pwm.parent_id = 0; + b->pins[10].pwm.mux_total = 1; + b->pins[10].pwm.mux[0].pin = 74; + b->pins[10].pwm.mux[0].value = 1; + + strncpy(b->pins[11].name, "IO11", 8); + b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0}; + b->pins[11].gpio.pinmap = 5; + b->pins[11].gpio.parent_id = 0; + b->pins[11].gpio.mux_total = 2; + b->pins[11].gpio.mux[0].pin = 72; + b->pins[11].gpio.mux[0].value = 0; + b->pins[11].gpio.mux[1].pin = 44; + b->pins[11].gpio.mux[1].value = 0; + b->pins[11].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[11].gpio.output_enable = 24; + b->pins[11].gpio.pullup_enable = 25; + b->pins[11].pwm.pinmap = 9; + b->pins[11].pwm.parent_id = 0; + b->pins[11].pwm.mux_total = 2; + b->pins[11].pwm.mux[0].pin = 72; + b->pins[11].pwm.mux[0].value = 1; + b->pins[11].pwm.mux[1].pin = 44; + b->pins[11].pwm.mux[1].value = 0; + b->pins[11].spi.pinmap = 1; + b->pins[11].spi.mux_total = 2; + b->pins[11].spi.mux[0].pin = 72; + b->pins[11].spi.mux[0].value = 0; + b->pins[11].spi.mux[0].pin = 44; + b->pins[11].spi.mux[0].value = 1; + + strncpy(b->pins[12].name, "IO12", 8); + b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0}; + b->pins[12].gpio.pinmap = 15; + b->pins[12].gpio.parent_id = 0; + b->pins[12].gpio.mux_total = 0; + b->pins[12].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[12].gpio.output_enable = 42; + b->pins[12].gpio.pullup_enable = 43; + b->pins[12].spi.pinmap = 1; + b->pins[12].spi.mux_total = 1; + b->pins[12].spi.mux[0].pin = 42; + b->pins[12].spi.mux[0].value = 1; + // THIS NEEDS TESTING UNSURE IF MOSI WILL BE EXPOSED. + + strncpy(b->pins[13].name, "IO13", 8); + b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0}; + b->pins[13].gpio.pinmap = 7; + b->pins[13].gpio.parent_id = 0; + b->pins[13].gpio.mux_total = 1; + b->pins[13].gpio.mux[0].pin = 46; + b->pins[13].gpio.mux[0].value = 0; + b->pins[13].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; + b->pins[13].gpio.output_enable = 30; + b->pins[13].gpio.pullup_enable = 31; + b->pins[13].spi.pinmap = 1; + b->pins[13].spi.mux_total = 1; + b->pins[13].spi.mux[0].pin = 46; + b->pins[13].spi.mux[0].value = 1; + + //ANALOG + strncpy(b->pins[14].name, "A0", 8); + b->pins[14].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; + b->pins[14].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[14].gpio.pullup_enable = 49; + b->pins[14].aio.pinmap = 0; + b->pins[14].aio.mux_total = 0; + + strncpy(b->pins[15].name, "A1", 8); + b->pins[15].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; + b->pins[15].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[15].gpio.pullup_enable = 51; + b->pins[15].aio.pinmap = 1; + b->pins[15].aio.mux_total = 0; + + strncpy(b->pins[16].name, "A2", 8); + b->pins[16].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; + b->pins[16].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[16].gpio.pullup_enable = 53; + b->pins[16].aio.pinmap = 2; + b->pins[16].aio.mux_total = 0; + + strncpy(b->pins[17].name, "A3", 8); + b->pins[17].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; + b->pins[17].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[17].gpio.pullup_enable = 55; + b->pins[17].aio.pinmap = 3; + b->pins[17].aio.mux_total = 0; + + strncpy(b->pins[18].name, "A4", 8); + b->pins[18].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1}; + b->pins[18].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[18].gpio.pullup_enable = 57; + b->pins[18].i2c.pinmap = 1; + b->pins[18].i2c.mux_total = 1; + b->pins[18].i2c.mux[0].pin = 60; + b->pins[18].i2c.mux[0].value = 0; + b->pins[18].aio.pinmap = 4; + b->pins[18].aio.mux_total = 2; + b->pins[18].aio.mux[0].pin = 60; + b->pins[18].aio.mux[0].value = 1; + b->pins[18].aio.mux[1].pin = 78; + b->pins[18].aio.mux[1].value = 0; + + strncpy(b->pins[19].name, "A5", 8); + b->pins[19].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1}; + b->pins[19].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; + b->pins[19].gpio.pullup_enable = 59; + b->pins[19].i2c.pinmap = 1; + b->pins[19].i2c.mux_total = 1; + b->pins[19].i2c.mux[0].pin = 60; + b->pins[19].i2c.mux[0].value = 0; + b->pins[19].aio.pinmap = 5; + b->pins[19].aio.mux_total = 2; + b->pins[19].aio.mux[0].pin = 60; + b->pins[19].aio.mux[0].value = 1; + b->pins[19].aio.mux[1].pin = 79; + b->pins[19].aio.mux[1].value = 0; + //BUS DEFINITIONS b->i2c_bus_count = 1; b->def_i2c_bus = 0; From 84d1e3ba25321e830085ba8a23bc811c2dff15f3 Mon Sep 17 00:00:00 2001 From: Brendan Le Foll Date: Wed, 18 Jun 2014 09:59:00 +0100 Subject: [PATCH 6/9] I2c-compass.cpp: fix example to use HMC5883L_CONT_MODE Signed-off-by: Brendan Le Foll --- examples/c++/I2c-compass.cpp | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/examples/c++/I2c-compass.cpp b/examples/c++/I2c-compass.cpp index f742981..84fb83b 100644 --- a/examples/c++/I2c-compass.cpp +++ b/examples/c++/I2c-compass.cpp @@ -86,25 +86,32 @@ void sig_handler(int signo) { if (signo == SIGINT) { - printf("closing PWM nicely\n"); + printf("closing nicely\n"); running = -1; } } int main () { -//! [Interesting] - maa::I2c* i2c; - i2c = new maa::I2c(0); float direction = 0; int16_t x = 0, y = 0, z = 0; uint8_t rx_tx_buf[MAX_BUFFER_LENGTH]; +//! [Interesting] + maa::I2c* i2c; + i2c = new maa::I2c(0); + i2c->address(HMC5883L_I2C_ADDR); rx_tx_buf[0] = HMC5883L_CONF_REG_B; rx_tx_buf[1] = GA_1_3_REG; i2c->write(rx_tx_buf, 2); //! [Interesting] + + i2c->address(HMC5883L_I2C_ADDR); + rx_tx_buf[0] = HMC5883L_MODE_REG; + rx_tx_buf[1] = HMC5883L_CONT_MODE; + i2c->write(rx_tx_buf, 2); + signal(SIGINT, sig_handler); while (running == 0) { From 76971c6b0b2f70a619d3d6f2c103c8ec15513fff Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Thu, 19 Jun 2014 13:54:19 +0100 Subject: [PATCH 7/9] maa: change dependency on direction for muxs * Will not error if cannot set direction, as some muxes are do not have * the direction file. If the mux really isnt in output mode the * following write would also fail. Signed-off-by: Thomas Ingleby --- src/maa.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/maa.c b/src/maa.c index bfb137e..4cb3283 100644 --- a/src/maa.c +++ b/src/maa.c @@ -119,8 +119,7 @@ maa_setup_mux_mapped(maa_pin_t meta) mux_i = maa_gpio_init_raw(meta.mux[mi].pin); if (mux_i == NULL) return MAA_ERROR_INVALID_HANDLE; - if (maa_gpio_dir(mux_i, MAA_GPIO_OUT) != MAA_SUCCESS) - return MAA_ERROR_INVALID_RESOURCE; + maa_gpio_dir(mux_i, MAA_GPIO_OUT); if (maa_gpio_write(mux_i, meta.mux[mi].value) != MAA_SUCCESS) return MAA_ERROR_INVALID_RESOURCE; } From 11486368b140bd9f02f022cbb005342afab05379 Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Fri, 20 Jun 2014 16:19:59 +0100 Subject: [PATCH 8/9] gpio: no printing to stderr on direction change. Signed-off-by: Thomas Ingleby --- src/gpio/gpio.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/gpio/gpio.c b/src/gpio/gpio.c index 0b12d8c..d38753c 100644 --- a/src/gpio/gpio.c +++ b/src/gpio/gpio.c @@ -389,7 +389,6 @@ maa_gpio_dir(maa_gpio_context dev, gpio_dir_t dir) } if (write(direction, bu, length*sizeof(char)) == -1) { - fprintf(stderr, "Failed to write to direction\n"); close(direction); return MAA_ERROR_INVALID_RESOURCE; } From 29171b7816eaf9e1dec608e29903d869bd46357a Mon Sep 17 00:00:00 2001 From: Thomas Ingleby Date: Fri, 20 Jun 2014 16:20:30 +0100 Subject: [PATCH 9/9] intel_galile_rev_g: pinmap add definition for io. * PWM working * SPI working Signed-off-by: Thomas Ingleby --- src/intel_galileo_rev_g.c | 72 ++++++++++++++++++++++++--------------- 1 file changed, 44 insertions(+), 28 deletions(-) diff --git a/src/intel_galileo_rev_g.c b/src/intel_galileo_rev_g.c index eecb2aa..5a6c926 100644 --- a/src/intel_galileo_rev_g.c +++ b/src/intel_galileo_rev_g.c @@ -87,13 +87,15 @@ maa_intel_galileo_gen2() b->pins[3].gpio.pullup_enable = 17; b->pins[3].pwm.pinmap = 1; b->pins[3].pwm.parent_id = 0; - b->pins[3].pwm.mux_total = 2; + b->pins[3].pwm.mux_total = 3; b->pins[3].pwm.mux[0].pin = 76; b->pins[3].pwm.mux[0].value = 0; b->pins[3].pwm.mux[1].pin = 64; b->pins[3].pwm.mux[1].value = 1; - //ADD Othher Bits? - + b->pins[3].pwm.mux[2].pin = 16; + b->pins[3].pwm.mux[2].value = 0; + //ADD Othher Bits? + strncpy(b->pins[4].name, "IO4", 8); b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; b->pins[4].gpio.pinmap = 6; @@ -102,7 +104,7 @@ maa_intel_galileo_gen2() b->pins[4].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; b->pins[4].gpio.output_enable = 36; b->pins[4].gpio.pullup_enable = 37; - + strncpy(b->pins[5].name, "IO5", 8); b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; b->pins[5].gpio.pinmap = 0; @@ -113,12 +115,14 @@ maa_intel_galileo_gen2() b->pins[5].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1}; b->pins[5].gpio.output_enable = 18; b->pins[5].gpio.pullup_enable = 19; - b->pins[5].pwm.pinmap = 3; + b->pins[5].pwm.pinmap = 4; b->pins[5].pwm.parent_id = 0; - b->pins[5].pwm.mux_total = 1; + b->pins[5].pwm.mux_total = 2; b->pins[5].pwm.mux[0].pin = 66; b->pins[5].pwm.mux[0].value = 1; - + b->pins[5].pwm.mux[1].pin = 18; + b->pins[5].pwm.mux[1].value = 0; + strncpy(b->pins[6].name, "IO6", 8); b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; b->pins[6].gpio.pinmap = 1; @@ -131,10 +135,12 @@ maa_intel_galileo_gen2() b->pins[6].gpio.pullup_enable = 21; b->pins[6].pwm.pinmap = 5; b->pins[6].pwm.parent_id = 0; - b->pins[6].pwm.mux_total = 1; + b->pins[6].pwm.mux_total = 2; b->pins[6].pwm.mux[0].pin = 68; b->pins[6].pwm.mux[0].value = 1; - + b->pins[6].pwm.mux[1].pin = 20; + b->pins[6].pwm.mux[1].value = 0; + strncpy(b->pins[7].name, "IO7", 8); b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; b->pins[7].gpio.pinmap = 38; @@ -142,7 +148,7 @@ maa_intel_galileo_gen2() b->pins[7].gpio.mux_total = 0; b->pins[7].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; b->pins[7].gpio.pullup_enable = 39; - + strncpy(b->pins[8].name, "IO8", 8); b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0}; b->pins[8].gpio.pinmap = 40; @@ -150,7 +156,7 @@ maa_intel_galileo_gen2() b->pins[8].gpio.mux_total = 0; b->pins[8].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; b->pins[8].gpio.pullup_enable = 41; - + strncpy(b->pins[9].name, "IO9", 8); b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; b->pins[9].gpio.pinmap = 4; @@ -163,10 +169,12 @@ maa_intel_galileo_gen2() b->pins[9].gpio.pullup_enable = 23; b->pins[9].pwm.pinmap = 7; b->pins[9].pwm.parent_id = 0; - b->pins[9].pwm.mux_total = 1; + b->pins[9].pwm.mux_total = 2; b->pins[9].pwm.mux[0].pin = 70; b->pins[9].pwm.mux[0].value = 1; - + b->pins[9].pwm.mux[1].pin = 22; + b->pins[9].pwm.mux[1].value = 0; + strncpy(b->pins[10].name, "IO10", 8); b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0}; b->pins[10].gpio.pinmap = 10; @@ -179,9 +187,11 @@ maa_intel_galileo_gen2() b->pins[10].gpio.pullup_enable = 27; b->pins[10].pwm.pinmap = 11; b->pins[10].pwm.parent_id = 0; - b->pins[10].pwm.mux_total = 1; + b->pins[10].pwm.mux_total = 2; b->pins[10].pwm.mux[0].pin = 74; b->pins[10].pwm.mux[0].value = 1; + b->pins[10].pwm.mux[1].pin = 26; + b->pins[10].pwm.mux[1].value = 0; strncpy(b->pins[11].name, "IO11", 8); b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0}; @@ -197,18 +207,22 @@ maa_intel_galileo_gen2() b->pins[11].gpio.pullup_enable = 25; b->pins[11].pwm.pinmap = 9; b->pins[11].pwm.parent_id = 0; - b->pins[11].pwm.mux_total = 2; + b->pins[11].pwm.mux_total = 3; b->pins[11].pwm.mux[0].pin = 72; b->pins[11].pwm.mux[0].value = 1; b->pins[11].pwm.mux[1].pin = 44; b->pins[11].pwm.mux[1].value = 0; + b->pins[11].pwm.mux[2].pin = 24; + b->pins[11].pwm.mux[2].value = 0; b->pins[11].spi.pinmap = 1; - b->pins[11].spi.mux_total = 2; + b->pins[11].spi.mux_total = 3; b->pins[11].spi.mux[0].pin = 72; b->pins[11].spi.mux[0].value = 0; - b->pins[11].spi.mux[0].pin = 44; - b->pins[11].spi.mux[0].value = 1; - + b->pins[11].spi.mux[1].pin = 44; + b->pins[11].spi.mux[2].value = 1; + b->pins[11].pwm.mux[2].pin = 24; + b->pins[11].pwm.mux[2].value = 0; + strncpy(b->pins[12].name, "IO12", 8); b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0}; b->pins[12].gpio.pinmap = 15; @@ -220,9 +234,9 @@ maa_intel_galileo_gen2() b->pins[12].spi.pinmap = 1; b->pins[12].spi.mux_total = 1; b->pins[12].spi.mux[0].pin = 42; - b->pins[12].spi.mux[0].value = 1; + b->pins[12].spi.mux[0].value = 0; // THIS NEEDS TESTING UNSURE IF MOSI WILL BE EXPOSED. - + strncpy(b->pins[13].name, "IO13", 8); b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0}; b->pins[13].gpio.pinmap = 7; @@ -234,10 +248,12 @@ maa_intel_galileo_gen2() b->pins[13].gpio.output_enable = 30; b->pins[13].gpio.pullup_enable = 31; b->pins[13].spi.pinmap = 1; - b->pins[13].spi.mux_total = 1; + b->pins[13].spi.mux_total = 2; b->pins[13].spi.mux[0].pin = 46; b->pins[13].spi.mux[0].value = 1; - + b->pins[13].spi.mux[1].pin = 30; + b->pins[13].spi.mux[1].value = 0; + //ANALOG strncpy(b->pins[14].name, "A0", 8); b->pins[14].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; @@ -245,7 +261,7 @@ maa_intel_galileo_gen2() b->pins[14].gpio.pullup_enable = 49; b->pins[14].aio.pinmap = 0; b->pins[14].aio.mux_total = 0; - + strncpy(b->pins[15].name, "A1", 8); b->pins[15].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; b->pins[15].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; @@ -259,14 +275,14 @@ maa_intel_galileo_gen2() b->pins[16].gpio.pullup_enable = 53; b->pins[16].aio.pinmap = 2; b->pins[16].aio.mux_total = 0; - + strncpy(b->pins[17].name, "A3", 8); b->pins[17].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1}; b->pins[17].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; b->pins[17].gpio.pullup_enable = 55; b->pins[17].aio.pinmap = 3; b->pins[17].aio.mux_total = 0; - + strncpy(b->pins[18].name, "A4", 8); b->pins[18].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1}; b->pins[18].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; @@ -281,7 +297,7 @@ maa_intel_galileo_gen2() b->pins[18].aio.mux[0].value = 1; b->pins[18].aio.mux[1].pin = 78; b->pins[18].aio.mux[1].value = 0; - + strncpy(b->pins[19].name, "A5", 8); b->pins[19].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1}; b->pins[19].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1}; @@ -296,7 +312,7 @@ maa_intel_galileo_gen2() b->pins[19].aio.mux[0].value = 1; b->pins[19].aio.mux[1].pin = 79; b->pins[19].aio.mux[1].value = 0; - + //BUS DEFINITIONS b->i2c_bus_count = 1; b->def_i2c_bus = 0;