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clang-format: run clang-format on C/C++ code

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Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Brendan Le Foll
2015-03-23 14:39:12 +00:00
parent 2174ee1673
commit ffcf3d7d07
46 changed files with 1630 additions and 1455 deletions
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115
src/x86/intel_galileo_rev_g.c
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@@ -36,12 +36,13 @@
#define UIO_PATH "/dev/uio0"
static uint8_t *mmap_reg = NULL;
static uint8_t* mmap_reg = NULL;
static int mmap_fd = 0;
static int mmap_size = 0x1000;
static unsigned int mmap_count = 0;
static unsigned int pullup_map[] = {33,29,35,17,37,19,21,39,41,23,27,25,43,31,49,51,53,55,57,59};
static unsigned int pullup_map[] = { 33, 29, 35, 17, 37, 19, 21, 39, 41, 23,
27, 25, 43, 31, 49, 51, 53, 55, 57, 59 };
static mraa_gpio_context agpioOutputen[MRAA_INTEL_GALILEO_GEN_2_PINCOUNT];
@@ -92,7 +93,7 @@ mraa_intel_galileo_gen2_gpio_close_pre(mraa_gpio_context dev)
mraa_result_t
mraa_intel_galileo_gen2_i2c_init_pre(unsigned int bus)
{
mraa_gpio_context io18 = mraa_gpio_init_raw(57);
mraa_gpio_context io18 = mraa_gpio_init_raw(57);
int status = 0;
if (io18 == NULL) {
@@ -120,7 +121,7 @@ mraa_result_t
mraa_intel_galileo_gen2_pwm_period_replace(mraa_pwm_context dev, int period)
{
char bu[MAX_SIZE];
snprintf(bu,MAX_SIZE ,"/sys/class/pwm/pwmchip%d/device/pwm_period", dev->chipid);
snprintf(bu, MAX_SIZE, "/sys/class/pwm/pwmchip%d/device/pwm_period", dev->chipid);
int period_f = open(bu, O_RDWR);
if (period_f == -1) {
@@ -129,7 +130,7 @@ mraa_intel_galileo_gen2_pwm_period_replace(mraa_pwm_context dev, int period)
}
char out[MAX_SIZE];
int length = snprintf(out, MAX_SIZE, "%d", period);
if (write(period_f, out, length*sizeof(char)) == -1) {
if (write(period_f, out, length * sizeof(char)) == -1) {
close(period_f);
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -142,8 +143,8 @@ mraa_result_t
mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mode)
{
if (dev->value_fp != -1) {
close(dev->value_fp);
dev->value_fp = -1;
close(dev->value_fp);
dev->value_fp = -1;
}
mraa_gpio_context pullup_e;
@@ -169,7 +170,7 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
char bu[MAX_SIZE];
int length;
int value = -1;
switch(mode) {
switch (mode) {
case MRAA_GPIO_STRONG:
length = snprintf(bu, sizeof(bu), "hiz");
break;
@@ -189,7 +190,7 @@ mraa_intel_galileo_gen2_gpio_mode_replace(mraa_gpio_context dev, gpio_mode_t mod
close(drive);
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(drive, bu, length*sizeof(char)) == -1) {
if (write(drive, bu, length * sizeof(char)) == -1) {
syslog(LOG_ERR, "galileo2: Failed to write to drive mode");
close(drive);
mraa_gpio_close(pullup_e);
@@ -257,10 +258,10 @@ mraa_intel_galileo_g2_mmap_write(mraa_gpio_context dev, int value)
{
int bitpos = plat->pins[dev->phy_pin].mmap.bit_pos;
if (value) {
*((unsigned *)mmap_reg) |= (1<<bitpos);
*((unsigned*) mmap_reg) |= (1 << bitpos);
return MRAA_SUCCESS;
}
*((unsigned *)mmap_reg) &= ~(1<<bitpos);
*((unsigned*) mmap_reg) &= ~(1 << bitpos);
return MRAA_SUCCESS;
}
@@ -299,8 +300,7 @@ mraa_intel_galileo_g2_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
syslog(LOG_ERR, "mmap: Unable to open UIO device");
return MRAA_ERROR_INVALID_RESOURCE;
}
mmap_reg = mmap(NULL, mmap_size, PROT_READ|PROT_WRITE,
MAP_SHARED, mmap_fd, 0);
mmap_reg = mmap(NULL, mmap_size, PROT_READ | PROT_WRITE, MAP_SHARED, mmap_fd, 0);
if (mmap_reg == MAP_FAILED) {
syslog(LOG_ERR, "mmap: failed to mmap");
@@ -309,8 +309,7 @@ mraa_intel_galileo_g2_mmap_setup(mraa_gpio_context dev, mraa_boolean_t en)
return MRAA_ERROR_NO_RESOURCES;
}
}
if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio)
!= MRAA_SUCCESS) {
if (mraa_setup_mux_mapped(plat->pins[dev->phy_pin].mmap.gpio) != MRAA_SUCCESS) {
syslog(LOG_ERR, "mmap: unable to setup required multiplexers");
return MRAA_ERROR_INVALID_RESOURCE;
}
@@ -344,17 +343,17 @@ mraa_intel_galileo_gen2()
advance_func->uart_init_pre = &mraa_intel_galileo_gen2_uart_init_pre;
advance_func->gpio_mmap_setup = &mraa_intel_galileo_g2_mmap_setup;
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
if (b->pins == NULL) {
goto error;
}
strncpy(b->pins[0].name, "IO0", 8);
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0,1};
b->pins[0].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 1 };
b->pins[0].gpio.pinmap = 11;
b->pins[0].gpio.parent_id = 0;
b->pins[0].gpio.mux_total = 0;
b->pins[0].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[0].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[0].gpio.output_enable = 32;
b->pins[0].gpio.pullup_enable = 33;
b->pins[0].mmap.gpio.pinmap = 11;
@@ -370,13 +369,13 @@ mraa_intel_galileo_gen2()
b->pins[0].uart.mux_total = 0;
strncpy(b->pins[1].name, "IO1", 8);
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0,1};
b->pins[1].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 1 };
b->pins[1].gpio.pinmap = 12;
b->pins[1].gpio.parent_id = 0;
b->pins[1].gpio.mux_total = 1;
b->pins[1].gpio.mux[0].pin = 45;
b->pins[1].gpio.mux[0].value = 0;
b->pins[1].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[1].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[1].gpio.output_enable = 28;
b->pins[1].gpio.pullup_enable = 29;
b->pins[1].mmap.gpio.pinmap = 12;
@@ -396,13 +395,13 @@ mraa_intel_galileo_gen2()
b->pins[1].uart.mux[0].value = 1;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0};
b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0 };
b->pins[2].gpio.pinmap = 13;
b->pins[2].gpio.parent_id = 0;
b->pins[2].gpio.mux_total = 1;
b->pins[2].gpio.mux[0].pin = 77;
b->pins[2].gpio.mux[0].value = 0;
b->pins[2].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[2].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[2].gpio.output_enable = 34;
b->pins[2].gpio.pullup_enable = 35;
b->pins[2].mmap.gpio.pinmap = 13;
@@ -418,7 +417,7 @@ mraa_intel_galileo_gen2()
b->pins[2].mmap.bit_pos = 5;
strncpy(b->pins[3].name, "IO3", 8);
b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0};
b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 0, 0, 0 };
b->pins[3].gpio.pinmap = 14;
b->pins[3].gpio.parent_id = 0;
b->pins[3].gpio.mux_total = 2;
@@ -426,7 +425,7 @@ mraa_intel_galileo_gen2()
b->pins[3].gpio.mux[0].value = 0;
b->pins[3].gpio.mux[1].pin = 64;
b->pins[3].gpio.mux[1].value = 0;
b->pins[3].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[3].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[3].gpio.output_enable = 16;
b->pins[3].gpio.pullup_enable = 17;
b->pins[3].pwm.pinmap = 1;
@@ -453,22 +452,22 @@ mraa_intel_galileo_gen2()
b->pins[3].mmap.bit_pos = 6;
strncpy(b->pins[4].name, "IO4", 8);
b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[4].gpio.pinmap = 6;
b->pins[4].gpio.parent_id = 0;
b->pins[4].gpio.mux_total = 0;
b->pins[4].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[4].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[4].gpio.output_enable = 36;
b->pins[4].gpio.pullup_enable = 37;
strncpy(b->pins[5].name, "IO5", 8);
b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[5].gpio.pinmap = 0;
b->pins[5].gpio.parent_id = 0;
b->pins[5].gpio.mux_total = 1;
b->pins[5].gpio.mux[0].pin = 66;
b->pins[5].gpio.mux[0].value = 0;
b->pins[5].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[5].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[5].gpio.output_enable = 18;
b->pins[5].gpio.pullup_enable = 19;
b->pins[5].pwm.pinmap = 3;
@@ -480,13 +479,13 @@ mraa_intel_galileo_gen2()
b->pins[5].pwm.mux[1].value = 0;
strncpy(b->pins[6].name, "IO6", 8);
b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[6].gpio.pinmap = 1;
b->pins[6].gpio.parent_id = 0;
b->pins[6].gpio.mux_total = 1;
b->pins[6].gpio.mux[0].pin = 68;
b->pins[6].gpio.mux[0].value = 0;
b->pins[6].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[6].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[6].gpio.output_enable = 20;
b->pins[6].gpio.pullup_enable = 21;
b->pins[6].pwm.pinmap = 5;
@@ -498,29 +497,29 @@ mraa_intel_galileo_gen2()
b->pins[6].pwm.mux[1].value = 0;
strncpy(b->pins[7].name, "IO7", 8);
b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[7].gpio.pinmap = 38;
b->pins[7].gpio.parent_id = 0;
b->pins[7].gpio.mux_total = 0;
b->pins[7].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[7].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[7].gpio.pullup_enable = 39;
strncpy(b->pins[8].name, "IO8", 8);
b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[8].gpio.pinmap = 40;
b->pins[8].gpio.parent_id = 0;
b->pins[8].gpio.mux_total = 0;
b->pins[8].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[8].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[8].gpio.pullup_enable = 41;
strncpy(b->pins[9].name, "IO9", 8);
b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[9].gpio.pinmap = 4;
b->pins[9].gpio.parent_id = 0;
b->pins[9].gpio.mux_total = 1;
b->pins[9].gpio.mux[0].pin = 70;
b->pins[9].gpio.mux[0].value = 0;
b->pins[9].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[9].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[9].gpio.output_enable = 22;
b->pins[9].gpio.pullup_enable = 23;
b->pins[9].pwm.pinmap = 7;
@@ -532,13 +531,13 @@ mraa_intel_galileo_gen2()
b->pins[9].pwm.mux[1].value = 0;
strncpy(b->pins[10].name, "IO10", 8);
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,1,1,0,0};
b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 1, 0, 0 };
b->pins[10].gpio.pinmap = 10;
b->pins[10].gpio.parent_id = 0;
b->pins[10].gpio.mux_total = 1;
b->pins[10].gpio.mux[0].pin = 74;
b->pins[10].gpio.mux[0].value = 0;
b->pins[10].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[10].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[10].gpio.output_enable = 26;
b->pins[10].gpio.pullup_enable = 27;
b->pins[10].pwm.pinmap = 11;
@@ -565,7 +564,7 @@ mraa_intel_galileo_gen2()
b->pins[10].spi.mux[0].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0 };
b->pins[11].gpio.pinmap = 5;
b->pins[11].gpio.parent_id = 0;
b->pins[11].gpio.mux_total = 2;
@@ -573,7 +572,7 @@ mraa_intel_galileo_gen2()
b->pins[11].gpio.mux[0].value = 0;
b->pins[11].gpio.mux[1].pin = 44;
b->pins[11].gpio.mux[1].value = 0;
b->pins[11].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[11].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[11].gpio.output_enable = 24;
b->pins[11].gpio.pullup_enable = 25;
b->pins[11].pwm.pinmap = 9;
@@ -595,11 +594,11 @@ mraa_intel_galileo_gen2()
b->pins[11].spi.mux[2].value = 0;
strncpy(b->pins[12].name, "IO12", 8);
b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,1,1,0,0};
b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 1, 0, 0 };
b->pins[12].gpio.pinmap = 15;
b->pins[12].gpio.parent_id = 0;
b->pins[12].gpio.mux_total = 0;
b->pins[12].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[12].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[12].gpio.output_enable = 42;
b->pins[12].gpio.pullup_enable = 43;
b->pins[12].spi.pinmap = 1;
@@ -617,13 +616,13 @@ mraa_intel_galileo_gen2()
b->pins[12].mmap.bit_pos = 7;
strncpy(b->pins[13].name, "IO13", 8);
b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0 };
b->pins[13].gpio.pinmap = 7;
b->pins[13].gpio.parent_id = 0;
b->pins[13].gpio.mux_total = 1;
b->pins[13].gpio.mux[0].pin = 46;
b->pins[13].gpio.mux[0].value = 0;
b->pins[13].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[13].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 1, 0, 1, 1 };
b->pins[13].gpio.output_enable = 30;
b->pins[13].gpio.pullup_enable = 31;
b->pins[13].spi.pinmap = 1;
@@ -633,10 +632,10 @@ mraa_intel_galileo_gen2()
b->pins[13].spi.mux[1].pin = 30;
b->pins[13].spi.mux[1].value = 0;
//ANALOG
// ANALOG
strncpy(b->pins[14].name, "A0", 8);
b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[14].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[14].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[14].gpio.pullup_enable = 49;
b->pins[14].aio.pinmap = 0;
b->pins[14].aio.mux_total = 1;
@@ -646,8 +645,8 @@ mraa_intel_galileo_gen2()
b->pins[14].gpio.mux_total = 0;
strncpy(b->pins[15].name, "A1", 8);
b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[15].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[15].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[15].gpio.pullup_enable = 51;
b->pins[15].aio.pinmap = 1;
b->pins[15].aio.mux[0].pin = 51;
@@ -657,8 +656,8 @@ mraa_intel_galileo_gen2()
b->pins[15].gpio.mux_total = 0;
strncpy(b->pins[16].name, "A2", 8);
b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[16].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[16].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[16].gpio.pullup_enable = 53;
b->pins[16].aio.pinmap = 2;
b->pins[16].aio.mux_total = 1;
@@ -668,8 +667,8 @@ mraa_intel_galileo_gen2()
b->pins[16].gpio.mux_total = 0;
strncpy(b->pins[17].name, "A3", 8);
b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[17].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[17].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[17].gpio.pullup_enable = 55;
b->pins[17].aio.pinmap = 3;
b->pins[17].aio.mux_total = 1;
@@ -679,8 +678,8 @@ mraa_intel_galileo_gen2()
b->pins[17].gpio.mux_total = 0;
strncpy(b->pins[18].name, "A4", 8);
b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[18].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
b->pins[18].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[18].gpio.pullup_enable = 57;
b->pins[18].i2c.pinmap = 1;
b->pins[18].i2c.mux_total = 1;
@@ -702,8 +701,8 @@ mraa_intel_galileo_gen2()
b->pins[18].gpio.mux[1].value = 1;
strncpy(b->pins[19].name, "A5", 8);
b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[19].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
b->pins[19].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[19].gpio.pullup_enable = 59;
b->pins[19].i2c.pinmap = 1;
b->pins[19].i2c.mux_total = 1;
@@ -724,7 +723,7 @@ mraa_intel_galileo_gen2()
b->pins[19].gpio.mux[1].pin = 79;
b->pins[19].gpio.mux[1].value = 1;
//BUS DEFINITIONS
// BUS DEFINITIONS
b->i2c_bus_count = 1;
b->def_i2c_bus = 0;
b->i2c_bus[0].bus_id = 0;