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19 Commits

Author SHA1 Message Date
Arora, Jeet
31c4a8d0db Added Intel Learning kit to platforms.
Signed-off-by: Arora, Jeet <jeet.arora@intel.com>
Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2021-04-07 12:41:08 -07:00
Michael Campion
1d18da9a22 upxtreme: add spdx tags to source files
Remove MIT notice and replace with SPDX tags in UP Xtreme sources.

Signed-off-by: Michael Campion <michael.campion@emutex.com>
2020-01-06 15:17:55 +00:00
Michael Campion
d954599045 upxtreme: Add UP Xtreme support
UP Xtreme is based on the Intel(R) Core(TM) i3/i5/i7 Whiskey Lake SoCs.
The UP Xtreme presents one Raspberry Pi compatible HAT connector.

This implementaion supports i2c, spi, uart, adc and gpio through the
40pin HAT connector.

Gpio chardev capabilities have been disabled in this implementation. When
gpio chardev capabilities are enabled an input becomes unreadable after an
isr has been registered to the pin. See here for details:

https://github.com/intel-iot-devkit/mraa/issues/937

Tested on UP Xtreme, with UP Board Linux kernel 5.0.0
Features tested: gpio, gpio interrupts, i2c, spi, adc and uart.

Signed-off-by: Michael Campion <michael.campion@emutex.com>
2020-01-06 15:17:55 +00:00
gowtham.r
4ba5da1144 adding Adlink IPi SMARC x86/ARM support
Signed-off-by: gowtham.r <gowtham.r@adlinktech.com>
2019-12-03 07:52:58 -08:00
Thomas Ingleby
170bdd104f spdx: add spdx tags to most files
Large change that removes the duplicated MIT notice withe a spdx tag

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2019-05-23 10:09:12 -07:00
Mihai Tudor Panu
9c5f940dad aiotdevkit: add support for IEI Tank platforms
Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
2018-05-31 21:21:53 -07:00
Mihai Stefanescu
9f7caf1561 Joule: Add gpiod mapping for Joule
Signed-off-by: Mihai Stefanescu <mihai.t.gh.stefanescu@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2018-03-05 13:42:02 +01:00
Javier Arteaga
04a40ed63f src/x86/up2.c: Add UP^2 EVT3 support
This commit adds a MRAA platform for the UP Squared board, EVT3 revision.
It handles the relevant FPGA configuration updates when using MRAA to
change pin modes or toggle GPIO directions.

Signed-off-by: Javier Arteaga <javier@emutex.com>
Signed-off-by: Nicola Lunghi <nicola.lunghi@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-09-12 11:54:39 +02:00
Wai Lun
0092e13f57 Joule: Update references to the Intel Joule
GT/GrosseTete -> Joule. This commit deprecates the MRAA_INTEL_GT_TUCHUCK
mraa_platform_t value and links the grossetete.md page to joule.md.

Signed-off-by: Wai Lun Poon <wai.lun.poon@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2017-02-27 18:06:40 +01:00
Bruce Beare
5704c15665 gt: Add module lights to the gpio HAL
Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-06-29 09:58:57 +01:00
Brendan Le Foll
0577321f4c intel_gt: add support for gt + Tuchuck board
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-06-23 16:16:38 +01:00
Dan O'Donovan
f9501c5c78 up: add support for UP Board
Add support for UP board (www.up-board.org), scoping
the following functions available via 40-pin header:
* GPIO (via sysfs)
* UART
* I2C
* SPI
* PWM

Validated on UP board v0.2, running ubilinux 3.0

Signed-off-by: Dan O'Donovan <dan@emutex.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-02-24 15:10:20 +00:00
Karena Anum Kamaruzaman
084883c210 Enable CherryHills (Braswell) support for GPIO
Enable the GPIOs for Cherryhills (Braswell).

Signed-off-by: Karena Anum Kamaruzaman <karena.anum.kamaruzaman@intel.com>
Signed-off-by: Constantin Musca <constantin.musca@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-02-05 15:47:35 +00:00
Constantin Musca
ba5318fee9 intel_minnow_byt_compatible: include Turbot additions
The pinout for the Low Speed Expansion on the MinnowBoard
Turbot is the same as the MinnowBoard MAX A2 desgin, with
the exception of pin 26. Pin 26 was changed to provide an MCLK
reference clock for I2S.
In addition, the D2 LED is now under GPIO control.
Add support for these changes.

Signed-off-by: Constantin Musca <constantin.musca@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-01-25 15:49:53 +00:00
Brendan Le Foll
bdb5ef66e9 mraa.c: Add mraa_get_platform_version call
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2016-01-21 15:28:03 +00:00
Lay, Kuan Loon
4ffb094063 SoFIA 3GR: Add SoFIA 3GR platform with i2c support
Add SoFIA 3GR platform file and define 4 i2c controller.

Signed-off-by: Lay, Kuan Loon <kuan.loon.lay@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2015-12-17 11:28:22 +00:00
Evan Steele
e2aaa349ff minnowboardmax: Add support for compatible boards
Signed-off-by: Evan Steele <evan.steele@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2015-09-15 15:38:46 +01:00
Brendan Le Foll
f95f2d8b35 nuc5: Add i2c support for intel 5th generation NUC
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2015-09-03 11:23:35 +01:00
Thomas Ingleby
79afd9173a x86: move x86 platform include files into own directory
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
2014-12-08 15:32:42 +00:00