Karena Anum Kamaruzaman
084883c210
Enable CherryHills (Braswell) support for GPIO
...
Enable the GPIOs for Cherryhills (Braswell).
Signed-off-by: Karena Anum Kamaruzaman <karena.anum.kamaruzaman@intel.com >
Signed-off-by: Constantin Musca <constantin.musca@intel.com >
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2016-02-05 15:47:35 +00:00
Constantin Musca
ba5318fee9
intel_minnow_byt_compatible: include Turbot additions
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The pinout for the Low Speed Expansion on the MinnowBoard
Turbot is the same as the MinnowBoard MAX A2 desgin, with
the exception of pin 26. Pin 26 was changed to provide an MCLK
reference clock for I2S.
In addition, the D2 LED is now under GPIO control.
Add support for these changes.
Signed-off-by: Constantin Musca <constantin.musca@intel.com >
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2016-01-25 15:49:53 +00:00
Brendan Le Foll
bdb5ef66e9
mraa.c: Add mraa_get_platform_version call
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Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2016-01-21 15:28:03 +00:00
Lay, Kuan Loon
4ffb094063
SoFIA 3GR: Add SoFIA 3GR platform with i2c support
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Add SoFIA 3GR platform file and define 4 i2c controller.
Signed-off-by: Lay, Kuan Loon <kuan.loon.lay@intel.com >
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2015-12-17 11:28:22 +00:00
Evan Steele
e2aaa349ff
minnowboardmax: Add support for compatible boards
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Signed-off-by: Evan Steele <evan.steele@intel.com >
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2015-09-15 15:38:46 +01:00
Brendan Le Foll
f95f2d8b35
nuc5: Add i2c support for intel 5th generation NUC
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Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com >
2015-09-03 11:23:35 +01:00
Thomas Ingleby
79afd9173a
x86: move x86 platform include files into own directory
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Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com >
2014-12-08 15:32:42 +00:00
