Fix memory leak in mraa_iio_update_channels() and mraa_iio_get_channel_data().
In mraa_iio_update_channels(), we add checking for out of bound array access.
Signed-off-by: Lay, Kuan Loon <kuan.loon.lay@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
- C API read/write integer functions changed to int to match C types
- C API now has close function to release resources acquired during init
- iio internal type isr_event() function now has args param in signature
- C++ API now supports events with handler interface and new data structure
- C and C++ examples updated to use API changes
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
E.g. on Edison they have LFs and that may cause problems
with downstream consumers of this data.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
We now take into account only "iio:device*" files to filter out
fake devices like triggers.
Closes#299.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This means that a valid platform is no longer required for iio operations and
therefore this is now only a req for using USBPLAT
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Code crept in from ft4222 branch merge and is superflous becuase of the new
advance function structure
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
scale and other attributes have to be read individually as they vary quite alot
depending on the channel. We only care/take data from scan_elements
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit creates a new structure inside each _iio device when used and can
then be used to understand the data being read after a trigger is run/executed
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This patch adds support to 96boards. 96boards is an open platform
specification. This spec strandardizes the pins on the external
connectors like Low speed and High speed. Given these pins are standard
across multiple boards, I think adding a generic 96boards made sense to
me.
The idea behind adding this generic board file is to make mraa work on
most of the 96boards with minimal changes to board support in libmraa.
This patch adds support to the LS expansion connector which has got 12
gpio pins + 2 i2c + 1 spi and 2 uarts.
For now I have added Dragaon board DB401c support as part of this patch
and is tested.
More info about board @ https://www.96boards.org/products/ce/dragonboard410c/
Long term plan is to get all this configuration from the /sys and
populate the board specifics dynamically, which is bit easy with
96boards specs in-place.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
The MRAA library needs the debugfs interface in order to access GPIO
pin modes attributes. Mounting the debugfs is not always desirable so this
patch instructs libmraa to first check for the required attributes in
the normal SYSFS CLASS GPIO interface and to use debugfs as a fallback.
Signed-off-by: Mihai Serban <mihai.serban@intel.com>
Signed-off-by: Constantin Musca <constantin.musca@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Add makefile for building libmraa library.
Import glob functionality from the NetBSD project where the glob.c and
glob.h files are released under BSD 3-clause License. Minor changes were
applied in order to make them compile for Android and Brillo.
This patch adds a control pipe used to interrupt the poll() function
as an alternative to pthread cancellation API.
Change-Id: Id719da4c839acbd320b0cc0e0113c2a5239c8029
Signed-off-by: Mihai Serban <mihai.serban@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
We need to use CMake variables to avoid installing things in the wrong places on
systems that have multilib enabled.
Signed-off-by: Kevron Rees <kevron.m.rees@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
