This means that you can initialise a non raw Pwm pin without having to redefine
chipid as -1 (anything but -1 enables raw mode for Pwm)
Fixes#93.
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This change also changes the C++ API write(char) call to writeByte(uint8_t) and
the write() call now takes a uint8_t* instead of a char*. This should not alter
any code significantly and does not affect the C API.
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
gcc-4.8.2 fails to build from source and complains :
error: format not a string literal and no format arguments
Signed-off-by: Philippe Coval <philippe.coval@open.eurogiciel.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Since gpios are +256 in 3.18+ kernels this stops dual definitions and possible
issues later on if errors are found
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Whilst this value is not used because it's only required by the aio module it
is interesting to have this information if we want to expose it to the user
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This should adjust the pinouts, at runtime, based on the current
kernel that's in use. The Linux kernel made a change between
3.17 and 3.18 ( specifically ea584595fc85e65796335033dfca25ed655cd0ed )
that changed the numbering for GPIOs. This obviously breaks everything
for mraa on the MinnowBoard MAX if you have a 3.18 or newer kernel.
Signed-off-by: John 'Warthog9' Hawley <john.hawley@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
The gpio_close_pre was put on the wrong board definition. So calling close of
GPIO pin on mini-board caused a fault
Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
I2c class now uses more C like constructs for added efficiency when using C++
and no longer returns a binary string when doing read() calls. This change also
removes the use of std::string in the SWIG API for read/write which never
worked very well. This also renames single write/read calls to {write,read}Byte
as whilst overloading works in C++ well it's a little confusing and only works
because {write,read}() calls have 2 arguments which will not be the case in the
SWIG API where those calls take a single argument (bytearray or node::Buffer),
especially in js where functions have no explicit args this does not work well.
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
There is an issue that mraa_pwm_write would fail, because mraa_pwm_read
would fail and return 0. When the read fails, journalctl shows an
error:
Dec 28 18:01:38 Edison libmraa[365]: pwm: Error in reading period
So now trying version, where the pwm object caches the period, that is
updated whenever you do a read or write of the period. Side benefit is
that the write should be sped up.
Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
Made like changes to Edison to cache the output enable.
Note: different than Edison as the pin structure holds enable pin number
instead of external array.
2nd note: noticed PU resistors are also in structure but there is also
external array.
Signed-off-by: Kurt Eckhardt <kurte@rockisland.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
It's already the case for rpi & MMAX but it should be noted that on 1 indexed
boards gpio_count should be +1
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
test was adding board gpio_count to pin so that 0 would use the info for pin 14
on some boards when asking for aio capability
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
mraa_init() will now:
- print user name and EUID of the process instead of UID,
- print full platform text name in addition to numeric type,
- return, log and print an error if started by non-root user
Fixes#64
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Doing so breaks galileo gen2 (gpio2) and others. Failing early is rather
pointless in any case so we may as well attempt the write, muxes do not
neccesarily have directions that work
Fixes#68
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
