/* * Author: Karena Anum Kamaruzaman * Copyright (c) 2016 Intel Corporation. * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sublicense, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ #include #include #include #include #include #include "common.h" #include "x86/intel_cherryhills.h" #define PLATFORM_NAME "Braswell Cherry Hill" mraa_board_t* mraa_intel_cherryhills() { mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); if (b == NULL) { return NULL; } b->platform_name = PLATFORM_NAME; b->phy_pin_count = MRAA_INTEL_CHERRYHILLS_PINCOUNT; b->aio_count = 0; b->adc_raw = 0; b->adc_supported = 0; b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * MRAA_INTEL_CHERRYHILLS_PINCOUNT); if (b->pins == NULL) { goto error; } b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); if (b->adv_func == NULL) { free(b->pins); goto error; } int pos = 0; //Physical header where these pins are: J3E5 strncpy(b->pins[pos].name, "GSUS6", 8); b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 416; b->pins[pos].gpio.mux_total = 0; pos++; strncpy(b->pins[pos].name, "GSUS8", 8); b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 409; b->pins[pos].gpio.mux_total = 0; pos++; strncpy(b->pins[pos].name, "GSUS7", 8); b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 414; b->pins[pos].gpio.mux_total = 0; pos++; //Physical header where these pins are: J3E3 strncpy(b->pins[pos].name, "GSUS0", 8); b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 406; b->pins[pos].gpio.mux_total = 0; pos++; strncpy(b->pins[pos].name, "GSUS1", 8); b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 }; b->pins[pos].gpio.pinmap = 410; b->pins[pos].gpio.mux_total = 0; pos++; return b; error: syslog(LOG_CRIT, "Cherryhills(Braswell): Platform failed to initialise"); free(b); return NULL; }