ssd1351: Changed SPI to MODE0 for compatibilty and listed SPI PM issue in description

Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
2016-03-31 16:16:46 -07:00
parent 68aa067f82
commit cf2b8c9a6e
2 changed files with 8 additions and 2 deletions
--- a/src/ssd1351/ssd1351.cxx
+++ b/src/ssd1351/ssd1351.cxx
@@ -44,7 +44,7 @@ SSD1351::SSD1351 (uint8_t oc, uint8_t dc, uint8_t rst) :

    // Setup SPI bus
    m_spi.frequency(8 * 1000000);
-    m_spi.mode(mraa::SPI_MODE3);
+    m_spi.mode(mraa::SPI_MODE0);
    m_spi.writeByte(0x00); // Need to bring clk high before init

    // Init pins