273 lines
9.6 KiB
C
273 lines
9.6 KiB
C
/*
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* Author: Jon Trulson <jtrulson@ics.com>
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* Copyright (c) 2017 Intel Corporation.
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*
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* The MIT License
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define BMM150_DEFAULT_I2C_BUS 0
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#define BMM150_DEFAULT_SPI_BUS 0
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#define BMM150_DEFAULT_ADDR 0x10
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#define BMM150_DEFAULT_CHIPID 0x32
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// NOTE: Reserved registers must not be written into. Reading
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// from them may return indeterminate values. Registers
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// containing reserved bitfields must be written as 0. Reading
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// reserved bitfields may return indeterminate values.
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/**
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* BMM150 registers
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*/
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typedef enum {
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BMM150_REG_CHIP_ID = 0x40,
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// 0x41 reserved
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BMM150_REG_MAG_X_LSB = 0x42,
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BMM150_REG_MAG_X_MSB = 0x43,
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BMM150_REG_MAG_Y_LSB = 0x44,
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BMM150_REG_MAG_Y_MSB = 0x45,
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BMM150_REG_MAG_Z_LSB = 0x46,
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BMM150_REG_MAG_Z_MSB = 0x47,
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BMM150_REG_RHALL_LSB = 0x48,
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BMM150_REG_RHALL_MSB = 0x49,
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BMM150_REG_INT_STATUS = 0x4a,
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BMM150_REG_POWER_CTRL = 0x4b,
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BMM150_REG_OPMODE = 0x4c,
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BMM150_REG_INT_EN = 0x4d,
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BMM150_REG_INT_CONFIG = 0x4e,
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BMM150_REG_LOW_THRES = 0x4f,
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BMM150_REG_HIGH_THRES = 0x50,
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BMM150_REG_REP_XY = 0x51,
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BMM150_REG_REP_Z = 0x52,
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// 0x53-0x71 reserved (mostly)
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// TRIM registers from Bosch BMM050 driver
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BMM150_REG_TRIM_DIG_X1 = 0x5d,
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BMM150_REG_TRIM_DIG_Y1 = 0x5e,
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BMM150_REG_TRIM_DIG_Z4_LSB = 0x62,
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BMM150_REG_TRIM_DIG_Z4_MSB = 0x63,
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BMM150_REG_TRIM_DIG_X2 = 0x64,
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BMM150_REG_TRIM_DIG_Y2 = 0x65,
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BMM150_REG_TRIM_DIG_Z2_LSB = 0x68,
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BMM150_REG_TRIM_DIG_Z2_MSB = 0x69,
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BMM150_REG_TRIM_DIG_Z1_LSB = 0x6a,
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BMM150_REG_TRIM_DIG_Z1_MSB = 0x6b,
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BMM150_REG_TRIM_DIG_XYZ1_LSB = 0x6c,
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BMM150_REG_TRIM_DIG_XYZ1_MSB = 0x6d,
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BMM150_REG_TRIM_DIG_Z3_LSB = 0x6e,
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BMM150_REG_TRIM_DIG_Z3_MSB = 0x6f,
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BMM150_REG_TRIM_DIG_XY2 = 0x70,
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BMM150_REG_TRIM_DIG_XY1 = 0x71
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} BMM150_REGS_T;
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/**
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* REG_MAG_XY_LSB bits (for X and Y mag data LSB's only)
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*/
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typedef enum {
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_BMM150_MAG_XY_LSB_RESERVED_BITS = 0x02 | 0x04,
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BMM150_MAG_XY_LSB_SELFTEST_XY = 0x01,
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BMM150_MAG_XY_LSB_LSB0 = 0x08,
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BMM150_MAG_XY_LSB_LSB1 = 0x10,
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BMM150_MAG_XY_LSB_LSB2 = 0x20,
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BMM150_MAG_XY_LSB_LSB3 = 0x40,
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BMM150_MAG_XY_LSB_LSB4 = 0x80,
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_BMM150_MAG_XY_LSB_LSB_MASK = 31,
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_BMM150_MAG_XY_LSB_LSB_SHIFT = 3
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} BMM150_MAG_XY_LSB_BITS_T;
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/**
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* REG_MAG_Z_LSB bits (for Z LSB only)
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*/
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typedef enum {
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BMM150_MAG_Z_LSB_SELFTEST_Z = 0x01,
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BMM150_MAG_Z_LSB_LSB0 = 0x02,
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BMM150_MAG_Z_LSB_LSB1 = 0x04,
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BMM150_MAG_Z_LSB_LSB2 = 0x08,
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BMM150_MAG_Z_LSB_LSB3 = 0x10,
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BMM150_MAG_Z_LSB_LSB4 = 0x20,
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BMM150_MAG_Z_LSB_LSB5 = 0x40,
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BMM150_MAG_Z_LSB_LSB6 = 0x80,
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_BMM150_MAG_Z_LSB_LSB_MASK = 127,
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_BMM150_MAG_Z_LSB_LSB_SHIFT = 1
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} MAG_Z_LSB_BITS_T;
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/**
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* REG_MAG_RHALL_LSB bits (for RHALL LSB only)
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*/
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typedef enum {
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_BMM150_MAG_RHALL_LSB_RESERVED_BITS = 0x02,
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BMM150_MAG_RHALL_LSB_DATA_READY_STATUS = 0x01,
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BMM150_MAG_RHALL_LSB_LSB0 = 0x04,
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BMM150_MAG_RHALL_LSB_LSB1 = 0x08,
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BMM150_MAG_RHALL_LSB_LSB2 = 0x10,
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BMM150_MAG_RHALL_LSB_LSB3 = 0x20,
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BMM150_MAG_RHALL_LSB_LSB4 = 0x40,
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BMM150_MAG_RHALL_LSB_LSB5 = 0x80,
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_BMM150_MAG_RHALL_LSB_LSB_MASK = 63,
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_BMM150_MAG_RHALL_LSB_LSB_SHIFT = 2
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} BMM150_MAG_RHALL_LSB_BITS_T;
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/**
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* REG_INT_STATUS bits
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*/
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typedef enum {
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BMM150_INT_STATUS_LOW_INT_X = 0x01,
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BMM150_INT_STATUS_LOW_INT_Y = 0x02,
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BMM150_INT_STATUS_LOW_INT_Z = 0x04,
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BMM150_INT_STATUS_HIGH_INT_X = 0x08,
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BMM150_INT_STATUS_HIGH_INT_Y = 0x10,
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BMM150_INT_STATUS_HIGH_INT_Z = 0x20,
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BMM150_INT_STATUS_OVERFLOW = 0x40,
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BMM150_INT_STATUS_DATA_OVERRUN = 0x80
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} BMM150_INT_STATUS_BITS_T;
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/**
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* REG_POWER_CTRL bits
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*/
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typedef enum {
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_BMM150_POWER_CTRL_RESERVED_BITS = 0x40 | 0x20 | 0x10 | 0x08,
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BMM150_POWER_CTRL_POWER_CTRL_BIT = 0x01,
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BMM150_POWER_CTRL_SOFT_RESET0 = 0x02,
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BMM150_POWER_CTRL_SPI3EN = 0x04, // not supported
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BMM150_POWER_CTRL_SOFT_RESET1 = 0x80
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} POWER_CTRL_BITS_T;
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/**
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* REG_OPMODE bits
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*/
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typedef enum {
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BMM150_OPMODE_SELFTTEST = 0x01,
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BMM150_OPMODE_OPERATION_MODE0 = 0x02,
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BMM150_OPMODE_OPERATION_MODE1 = 0x04,
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_BMM150_OPMODE_OPERATION_MODE_MASK = 3,
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_BMM150_OPMODE_OPERATION_MODE_SHIFT = 1,
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BMM150_OPMODE_DATA_RATE0 = 0x08,
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BMM150_OPMODE_DATA_RATE1 = 0x10,
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BMM150_OPMODE_DATA_RATE2 = 0x20,
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_BMM150_OPMODE_DATA_RATE_MASK = 7,
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_BMM150_OPMODE_DATA_RATE_SHIFT = 3,
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BMM150_OPMODE_ADV_SELFTEST0 = 0x40,
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BMM150_OPMODE_ADV_SELFTEST1 = 0x80,
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_BMM150_OPMODE_ADV_SELFTEST_MASK = 3,
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_BMM150_OPMODE_ADV_SELFTEST_SHIFT = 6
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} OPMODE_BITS_T;
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/**
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* OPMODE_OPERATION_MODE values
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*/
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typedef enum {
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BMM150_OPERATION_MODE_NORMAL = 0,
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BMM150_OPERATION_MODE_FORCED = 1,
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BMM150_OPERATION_MODE_SLEEP = 3
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} BMM150_OPERATION_MODE_T;
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/**
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* OPMODE_DATA_RATE values
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*/
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typedef enum {
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BMM150_DATA_RATE_10HZ = 0,
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BMM150_DATA_RATE_2HZ = 1,
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BMM150_DATA_RATE_6HZ = 2,
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BMM150_DATA_RATE_8HZ = 3,
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BMM150_DATA_RATE_15HZ = 4,
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BMM150_DATA_RATE_20HZ = 5,
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BMM150_DATA_RATE_25HZ = 6,
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BMM150_DATA_RATE_30HZ = 7
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} BMM150_DATA_RATE_T;
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/**
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* REG_INT_EN bits
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*/
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typedef enum {
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BMM150_INT_EN_LOW_INT_X_EN = 0x01,
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BMM150_INT_EN_LOW_INT_Y_EN = 0x02,
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BMM150_INT_EN_LOW_INT_Z_EN = 0x04,
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BMM150_INT_EN_HIGH_INT_X_EN = 0x08,
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BMM150_INT_EN_HIGH_INT_Y_EN = 0x10,
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BMM150_INT_EN_HIGH_INT_Z_EN = 0x20,
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BMM150_INT_EN_OVERFLOW_INT_EN = 0x40,
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BMM150_INT_EN_DATA_OVERRUN_INT_EN = 0x80
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} BMM150_INT_EN_T;
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/**
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* REG_INT_CONFIG bits
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*/
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typedef enum {
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BMM150_INT_CONFIG_INT_POLARITY = 0x01,
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BMM150_INT_CONFIG_INT_LATCH = 0x02,
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BMM150_INT_CONFIG_DR_POLARITY = 0x04,
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BMM150_INT_CONFIG_CHANNEL_X = 0x08,
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BMM150_INT_CONFIG_CHANNEL_Y = 0x10,
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BMM150_INT_CONFIG_CHANNEL_Z = 0x20,
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BMM150_INT_CONFIG_INT_PIN_EN = 0x40,
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BMM150_INT_CONFIG_DR_PIN_EN = 0x80
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} BMM150_INT_CONFIG_T;
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/**
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* Interrupt selection for installISR() and uninstallISR()
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*/
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typedef enum {
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BMM150_INTERRUPT_INT,
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BMM150_INTERRUPT_DR
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} BMM150_INTERRUPT_PINS_T;
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/**
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* Bosch recommended usage preset modes
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*/
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typedef enum {
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BMM150_USAGE_LOW_POWER,
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BMM150_USAGE_REGULAR,
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BMM150_USAGE_ENHANCED_REGULAR,
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BMM150_USAGE_HIGH_ACCURACY
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} BMM150_USAGE_PRESETS_T;
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#ifdef __cplusplus
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}
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#endif
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