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x86: Fix capabilities being initialised with only 7 bits

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This whilst ugly should not cause an issue because of our use of calloc.

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Brendan Le Foll
2016-05-19 10:23:09 +01:00
parent 3969af2b24
commit 022b36355f
2 changed files with 28 additions and 28 deletions
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20
src/x86/intel_edison_fab_c.c
View File

@@ -811,7 +811,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
int pos = 0;
strncpy(b->pins[pos].name, "J17-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 182;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 2;
@@ -898,7 +898,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
pos++;
strncpy(b->pins[pos].name, "J18-1", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 , 0};
b->pins[pos].gpio.pinmap = 13;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 1;
@@ -907,7 +907,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
pos++;
strncpy(b->pins[pos].name, "J18-2", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 165;
b->pins[pos].gpio.mux_total = 0;
pos++;
@@ -930,7 +930,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
pos++;
strncpy(b->pins[pos].name, "J18-7", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 12;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 0;
@@ -939,7 +939,7 @@ mraa_intel_edison_miniboard(mraa_board_t* b)
pos++;
strncpy(b->pins[pos].name, "J18-8", 8);
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[pos].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 183;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].pwm.pinmap = 3;
@@ -1316,7 +1316,7 @@ mraa_intel_edison_fab_c()
b->pins[1].uart.mux_total = 0;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[2].gpio.pinmap = 128;
b->pins[2].gpio.parent_id = 0;
b->pins[2].gpio.mux_total = 1;
@@ -1325,7 +1325,7 @@ mraa_intel_edison_fab_c()
b->pins[2].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[3].name, "IO3", 8);
b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[3].gpio.pinmap = 12;
b->pins[3].gpio.parent_id = 0;
b->pins[3].gpio.mux_total = 1;
@@ -1337,7 +1337,7 @@ mraa_intel_edison_fab_c()
b->pins[3].pwm.mux_total = 0;
strncpy(b->pins[4].name, "IO4", 8);
b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[4].gpio.pinmap = 129;
b->pins[4].gpio.parent_id = 0;
b->pins[4].gpio.mux_total = 1;
@@ -1370,7 +1370,7 @@ mraa_intel_edison_fab_c()
b->pins[6].pwm.mux_total = 0;
strncpy(b->pins[7].name, "IO7", 8);
b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[7].gpio.pinmap = 48;
b->pins[7].gpio.parent_id = 0;
b->pins[7].gpio.mux_total = 1;
@@ -1379,7 +1379,7 @@ mraa_intel_edison_fab_c()
b->pins[7].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[8].name, "IO8", 8);
b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[8].gpio.pinmap = 49;
b->pins[8].gpio.parent_id = 0;
b->pins[8].gpio.mux_total = 1;

36
src/x86/intel_galileo_rev_g.c
View File

@@ -371,7 +371,7 @@ mraa_intel_galileo_gen2()
b->pins[1].uart.mux[2].value = 0;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0 };
b->pins[2].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 0, 0, 0, 0};
b->pins[2].gpio.pinmap = 13;
b->pins[2].gpio.parent_id = 0;
b->pins[2].gpio.mux_total = 2;
@@ -402,7 +402,7 @@ mraa_intel_galileo_gen2()
b->pins[2].mmap.bit_pos = 5;
strncpy(b->pins[3].name, "IO3", 8);
b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 0, 0, 0 };
b->pins[3].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 0, 0, 0, 0 };
b->pins[3].gpio.pinmap = 14;
b->pins[3].gpio.parent_id = 0;
b->pins[3].gpio.mux_total = 3;
@@ -454,7 +454,7 @@ mraa_intel_galileo_gen2()
b->pins[3].mmap.bit_pos = 6;
strncpy(b->pins[4].name, "IO4", 8);
b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[4].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[4].gpio.pinmap = 6;
b->pins[4].gpio.parent_id = 0;
b->pins[4].gpio.mux_total = 1;
@@ -465,7 +465,7 @@ mraa_intel_galileo_gen2()
b->pins[4].gpio.output_enable = 36;
strncpy(b->pins[5].name, "IO5", 8);
b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[5].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 , 0 };
b->pins[5].gpio.pinmap = 0;
b->pins[5].gpio.parent_id = 0;
b->pins[5].gpio.mux_total = 2;
@@ -491,7 +491,7 @@ mraa_intel_galileo_gen2()
b->pins[5].pwm.mux[2].value = 0;
strncpy(b->pins[6].name, "IO6", 8);
b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[6].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[6].gpio.pinmap = 1;
b->pins[6].gpio.parent_id = 0;
b->pins[6].gpio.mux_total = 2;
@@ -517,7 +517,7 @@ mraa_intel_galileo_gen2()
b->pins[6].pwm.mux[2].value = 0;
strncpy(b->pins[7].name, "IO7", 8);
b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[7].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[7].gpio.pinmap = 38;
b->pins[7].gpio.parent_id = 0;
b->pins[7].gpio.mux_total = 1;
@@ -527,7 +527,7 @@ mraa_intel_galileo_gen2()
b->pins[7].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
strncpy(b->pins[8].name, "IO8", 8);
b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0 };
b->pins[8].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[8].gpio.pinmap = 40;
b->pins[8].gpio.parent_id = 0;
b->pins[8].gpio.mux_total = 1;
@@ -537,7 +537,7 @@ mraa_intel_galileo_gen2()
b->pins[8].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
strncpy(b->pins[9].name, "IO9", 8);
b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0 };
b->pins[9].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 0, 0, 0, 0 };
b->pins[9].gpio.pinmap = 4;
b->pins[9].gpio.parent_id = 0;
b->pins[9].gpio.mux_total = 2;
@@ -563,7 +563,7 @@ mraa_intel_galileo_gen2()
b->pins[9].pwm.mux[2].value = 0;
strncpy(b->pins[10].name, "IO10", 8);
b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 1, 0, 0 };
b->pins[10].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 1, 1, 0, 0, 0 };
b->pins[10].gpio.pinmap = 10;
b->pins[10].gpio.parent_id = 0;
b->pins[10].gpio.mux_total = 2;
@@ -617,7 +617,7 @@ mraa_intel_galileo_gen2()
b->pins[10].spi.mux[2].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0 };
b->pins[11].capabilites = (mraa_pincapabilities_t){ 1, 1, 1, 0, 1, 0, 0, 0 };
b->pins[11].gpio.pinmap = 5;
b->pins[11].gpio.parent_id = 0;
b->pins[11].gpio.mux_total = 3;
@@ -663,7 +663,7 @@ mraa_intel_galileo_gen2()
b->pins[11].spi.mux[3].value = 0;
strncpy(b->pins[12].name, "IO12", 8);
b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 1, 0, 0 };
b->pins[12].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 1, 1, 0, 0, 0 };
b->pins[12].gpio.pinmap = 15;
b->pins[12].gpio.parent_id = 0;
b->pins[12].gpio.mux_total = 1;
@@ -696,7 +696,7 @@ mraa_intel_galileo_gen2()
b->pins[12].mmap.bit_pos = 7;
strncpy(b->pins[13].name, "IO13", 8);
b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0 };
b->pins[13].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 1, 0, 0, 0 };
b->pins[13].gpio.pinmap = 7;
b->pins[13].gpio.parent_id = 0;
b->pins[13].gpio.mux_total = 2;
@@ -722,7 +722,7 @@ mraa_intel_galileo_gen2()
// ANALOG
strncpy(b->pins[14].name, "A0", 8);
b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[14].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[14].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[14].aio.pinmap = 0;
b->pins[14].aio.mux_total = 2;
@@ -739,7 +739,7 @@ mraa_intel_galileo_gen2()
b->pins[14].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[15].name, "A1", 8);
b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[15].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[15].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[15].aio.pinmap = 1;
b->pins[15].aio.mux_total = 2;
@@ -756,7 +756,7 @@ mraa_intel_galileo_gen2()
b->pins[15].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[16].name, "A2", 8);
b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[16].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[16].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[16].aio.pinmap = 2;
b->pins[16].aio.mux_total = 2;
@@ -773,7 +773,7 @@ mraa_intel_galileo_gen2()
b->pins[16].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[17].name, "A3", 8);
b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1 };
b->pins[17].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 1, 0 };
b->pins[17].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[17].aio.pinmap = 3;
b->pins[17].aio.mux_total = 2;
@@ -790,7 +790,7 @@ mraa_intel_galileo_gen2()
b->pins[17].gpio.mux[0].value = MRAA_GPIO_IN;
strncpy(b->pins[18].name, "A4", 8);
b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
b->pins[18].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
b->pins[18].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[18].i2c.pinmap = 1;
b->pins[18].i2c.mux_total = 3;
@@ -827,7 +827,7 @@ mraa_intel_galileo_gen2()
b->pins[18].gpio.mux[2].value = 1;
strncpy(b->pins[19].name, "A5", 8);
b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1 };
b->pins[19].capabilites = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 1, 1, 0 };
b->pins[19].gpio.complex_cap = (mraa_pin_cap_complex_t){ 1, 0, 0, 1, 1 };
b->pins[19].i2c.pinmap = 1;
b->pins[19].i2c.mux_total = 3;