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mraa: rename from maa to mraa

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Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
This commit is contained in:
Thomas Ingleby
2014-06-24 17:24:54 +01:00
parent 79d0da4853
commit 6853997a92
74 changed files with 966 additions and 966 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
src/CMakeLists.txt
View File

@@ -1,11 +1,11 @@
include_directories(
${PROJECT_SOURCE_DIR}/api
${PROJECT_SOURCE_DIR}/api/maa
${PROJECT_SOURCE_DIR}/api/mraa
${PROJECT_SOURCE_DIR}/include
)
set (maa_LIB_SRCS
${PROJECT_SOURCE_DIR}/src/maa.c
set (mraa_LIB_SRCS
${PROJECT_SOURCE_DIR}/src/mraa.c
${PROJECT_SOURCE_DIR}/src/gpio/gpio.c
${PROJECT_SOURCE_DIR}/src/i2c/i2c.c
${PROJECT_SOURCE_DIR}/src/i2c/smbus.c
@@ -18,30 +18,30 @@ set (maa_LIB_SRCS
${CMAKE_CURRENT_BINARY_DIR}/version.c
)
set (maa_LIB_GLOB_HEADERS
${PROJECT_SOURCE_DIR}/api/maa.h
${PROJECT_SOURCE_DIR}/api/maa.hpp
set (mraa_LIB_GLOB_HEADERS
${PROJECT_SOURCE_DIR}/api/mraa.h
${PROJECT_SOURCE_DIR}/api/mraa.hpp
)
add_library (maa SHARED ${maa_LIB_SRCS})
target_link_libraries (maa ${CMAKE_THREAD_LIBS_INIT})
add_library (mraa SHARED ${mraa_LIB_SRCS})
target_link_libraries (mraa ${CMAKE_THREAD_LIBS_INIT})
set_target_properties(
maa
mraa
PROPERTIES
SOVERSION ${maa_VERSION_MAJOR}
VERSION ${maa_VERSION_STRING}
SOVERSION ${mraa_VERSION_MAJOR}
VERSION ${mraa_VERSION_STRING}
)
install (FILES ${maa_LIB_GLOB_HEADERS} DESTINATION include/)
install (DIRECTORY ${PROJECT_SOURCE_DIR}/api/maa/ DESTINATION include/maa)
install (FILES ${mraa_LIB_GLOB_HEADERS} DESTINATION include/)
install (DIRECTORY ${PROJECT_SOURCE_DIR}/api/mraa/ DESTINATION include/mraa)
macro (maa_CREATE_INSTALL_PKGCONFIG generated_file install_location)
macro (mraa_CREATE_INSTALL_PKGCONFIG generated_file install_location)
configure_file (${generated_file}.cmake ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} @ONLY)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/${generated_file} DESTINATION ${install_location})
endmacro (maa_CREATE_INSTALL_PKGCONFIG)
maa_create_install_pkgconfig (maa.pc lib${LIB_SUFFIX}/pkgconfig)
endmacro (mraa_CREATE_INSTALL_PKGCONFIG)
mraa_create_install_pkgconfig (mraa.pc lib${LIB_SUFFIX}/pkgconfig)
install (TARGETS maa DESTINATION lib)
install (TARGETS mraa DESTINATION lib)
if (DOXYGEN_FOUND)
set (CMAKE_SWIG_FLAGS -DDOXYGEN=${DOXYGEN_FOUND})
@@ -49,9 +49,9 @@ if (DOXYGEN_FOUND)
foreach (_file ${DOCCLASSES})
add_custom_command (OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${_file}_class_doc.i
COMMAND ${PYTHON_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/doxy2swig.py -n
${CMAKE_BINARY_DIR}/xml/classmaa_1_1_${_file}.xml
${CMAKE_BINARY_DIR}/xml/classmraa_1_1_${_file}.xml
${CMAKE_CURRENT_BINARY_DIR}/${_file}_class_doc.i
DEPENDS ${CMAKE_BINARY_DIR}/xml/classmaa_1_1_${_file}.xml
DEPENDS ${CMAKE_BINARY_DIR}/xml/classmraa_1_1_${_file}.xml
)
add_custom_target (${_file}class_doc_i DEPENDS ${CMAKE_CURRENT_BINARY_DIR}/${_file}_class_doc.i)
add_dependencies (${_file}class_doc_i doc)
@@ -73,7 +73,7 @@ if (BUILDSWIG)
find_package (SWIG)
if (SWIG_FOUND)
include (${SWIG_USE_FILE})
set_source_files_properties (maa.i PROPERTIES SWIG_FLAGS "-I${CMAKE_BINARY_DIR}/src")
set_source_files_properties (mraa.i PROPERTIES SWIG_FLAGS "-I${CMAKE_BINARY_DIR}/src")
if (BUILDSWIGPYTHON)
add_subdirectory (python)

30
src/aio/aio.c
View File

@@ -27,14 +27,14 @@
#include <errno.h>
#include "aio.h"
#include "maa_internal.h"
#include "mraa_internal.h"
struct _aio {
unsigned int channel;
int adc_in_fp;
};
static maa_result_t aio_get_valid_fp(maa_aio_context dev)
static mraa_result_t aio_get_valid_fp(mraa_aio_context dev)
{
char file_path[64]= "";
@@ -45,22 +45,22 @@ static maa_result_t aio_get_valid_fp(maa_aio_context dev)
dev->adc_in_fp = open(file_path, O_RDONLY);
if (dev->adc_in_fp == -1) {
fprintf(stderr, "Failed to open Analog input raw file %s for "
"reading!\n", file_path); return( MAA_ERROR_INVALID_RESOURCE);
"reading!\n", file_path); return( MRAA_ERROR_INVALID_RESOURCE);
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
/** Initialise an Analog input, connected to the specified channel
*
* @param aio_channel Analog input channel to read
*
* @returns pointer to maa_aio_context structure after initialisation of
* @returns pointer to mraa_aio_context structure after initialisation of
* Analog input pin connected to the device successfully, else returns NULL.
*/
maa_aio_context maa_aio_init(unsigned int aio_channel)
mraa_aio_context mraa_aio_init(unsigned int aio_channel)
{
int checked_pin = maa_setup_aio(aio_channel);
int checked_pin = mraa_setup_aio(aio_channel);
if (checked_pin < 0) {
switch(checked_pin) {
case -1:
@@ -79,7 +79,7 @@ maa_aio_context maa_aio_init(unsigned int aio_channel)
}
//Create ADC device connected to specified channel
maa_aio_context dev = malloc(sizeof(struct _aio));
mraa_aio_context dev = malloc(sizeof(struct _aio));
if (dev == NULL) {
fprintf(stderr, "Insufficient memory for specified Analog input channel "
"%d\n", aio_channel);
@@ -88,7 +88,7 @@ maa_aio_context maa_aio_init(unsigned int aio_channel)
dev->channel = checked_pin;
//Open valid analog input file and get the pointer.
if (MAA_SUCCESS != aio_get_valid_fp(dev)) {
if (MRAA_SUCCESS != aio_get_valid_fp(dev)) {
free(dev);
return NULL;
}
@@ -99,14 +99,14 @@ maa_aio_context maa_aio_init(unsigned int aio_channel)
/** Read the input voltage, represented as an unsigned short in the range [0x0,
* 0xFFFF]
*
* @param pointer to maa_aio_context structure initialised by
* maa_aio_init()
* @param pointer to mraa_aio_context structure initialised by
* mraa_aio_init()
*
* @returns
* unsigned 16 bit int representing the current input voltage, normalised to
* a 16-bit value
*/
uint16_t maa_aio_read(maa_aio_context dev)
uint16_t mraa_aio_read(mraa_aio_context dev)
{
char buffer[16];
unsigned int shifter_value = 0;
@@ -147,12 +147,12 @@ uint16_t maa_aio_read(maa_aio_context dev)
*
* @param dev - the analog input context
*
* @return maa result type.
* @return mraa result type.
*/
maa_result_t maa_aio_close(maa_aio_context dev)
mraa_result_t mraa_aio_close(mraa_aio_context dev)
{
if (NULL != dev)
free(dev);
return(MAA_SUCCESS);
return(MRAA_SUCCESS);
}

222
src/gpio/gpio.c
View File

@@ -23,7 +23,7 @@
* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "gpio.h"
#include "maa_internal.h"
#include "mraa_internal.h"
#include <stdlib.h>
#include <fcntl.h>
@@ -52,41 +52,41 @@ struct _gpio {
void *isr_args; /**< args return when interupt service request triggered */
pthread_t thread_id; /**< the isr handler thread id */
int isr_value_fp; /**< the isr file pointer on the value */
maa_boolean_t owner; /**< If this context originally exported the pin */
maa_boolean_t mmap;
mraa_boolean_t owner; /**< If this context originally exported the pin */
mraa_boolean_t mmap;
void *reg;
unsigned int reg_sz;
unsigned int reg_bit_pos;
/*@}*/
};
static maa_result_t
maa_gpio_get_valfp(maa_gpio_context dev)
static mraa_result_t
mraa_gpio_get_valfp(mraa_gpio_context dev)
{
char bu[MAX_SIZE];
sprintf(bu, SYSFS_CLASS_GPIO "/gpio%d/value", dev->pin);
dev->value_fp = open(bu, O_RDWR);
if (dev->value_fp == -1) {
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_gpio_context
maa_gpio_init(int pin)
mraa_gpio_context
mraa_gpio_init(int pin)
{
int pinm = maa_setup_gpio(pin);
int pinm = mraa_setup_gpio(pin);
if (pinm < 0)
return NULL;
maa_gpio_context r = maa_gpio_init_raw(pinm);
mraa_gpio_context r = mraa_gpio_init_raw(pinm);
r->phy_pin = pin;
return r;
}
maa_gpio_context
maa_gpio_init_raw(int pin)
mraa_gpio_context
mraa_gpio_init_raw(int pin)
{
if (pin < 0)
return NULL;
@@ -94,7 +94,7 @@ maa_gpio_init_raw(int pin)
char bu[MAX_SIZE];
int length;
maa_gpio_context dev = (maa_gpio_context) malloc(sizeof(struct _gpio));
mraa_gpio_context dev = (mraa_gpio_context) malloc(sizeof(struct _gpio));
memset(dev, 0, sizeof(struct _gpio));
dev->value_fp = -1;
dev->isr_value_fp = -1;
@@ -125,19 +125,19 @@ maa_gpio_init_raw(int pin)
return dev;
}
static maa_result_t
maa_gpio_write_register(maa_gpio_context dev,int value)
static mraa_result_t
mraa_gpio_write_register(mraa_gpio_context dev,int value)
{
if (value == 1) {
*((unsigned *)dev->reg) |= (1<<dev->reg_bit_pos);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
*((unsigned *)dev->reg) &= ~(1<<dev->reg_bit_pos);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
static maa_result_t
maa_gpio_wait_interrupt(int fd)
static mraa_result_t
mraa_gpio_wait_interrupt(int fd)
{
unsigned char c;
struct pollfd pfd;
@@ -150,7 +150,7 @@ maa_gpio_wait_interrupt(int fd)
read (fd, &c, 1);
if (fd <= 0) {
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
// Wait for it forever or until pthread_cancel
@@ -160,14 +160,14 @@ maa_gpio_wait_interrupt(int fd)
// do a final read to clear interupt
read (fd, &c, 1);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
static void*
maa_gpio_interrupt_handler(void* arg)
mraa_gpio_interrupt_handler(void* arg)
{
maa_gpio_context dev = (maa_gpio_context) arg;
maa_result_t ret;
mraa_gpio_context dev = (mraa_gpio_context) arg;
mraa_result_t ret;
// open gpio value with open(3)
char bu[MAX_SIZE];
@@ -175,8 +175,8 @@ maa_gpio_interrupt_handler(void* arg)
dev->isr_value_fp = open(bu, O_RDONLY);
for (;;) {
ret = maa_gpio_wait_interrupt(dev->isr_value_fp);
if (ret == MAA_SUCCESS) {
ret = mraa_gpio_wait_interrupt(dev->isr_value_fp);
if (ret == MRAA_SUCCESS) {
pthread_setcancelstate(PTHREAD_CANCEL_DISABLE, NULL);
#ifdef SWIGPYTHON
// In order to call a python object (all python functions are objects) we
@@ -214,8 +214,8 @@ maa_gpio_interrupt_handler(void* arg)
}
}
maa_result_t
maa_gpio_edge_mode(maa_gpio_context dev, gpio_edge_t mode)
mraa_result_t
mraa_gpio_edge_mode(mraa_gpio_context dev, gpio_edge_t mode)
{
if (dev->value_fp != -1) {
close(dev->value_fp);
@@ -228,61 +228,61 @@ maa_gpio_edge_mode(maa_gpio_context dev, gpio_edge_t mode)
int edge = open(filepath, O_RDWR);
if (edge == -1) {
fprintf(stderr, "Failed to open edge for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length;
switch(mode) {
case MAA_GPIO_EDGE_NONE:
case MRAA_GPIO_EDGE_NONE:
length = snprintf(bu, sizeof(bu), "none");
break;
case MAA_GPIO_EDGE_BOTH:
case MRAA_GPIO_EDGE_BOTH:
length = snprintf(bu, sizeof(bu), "both");
break;
case MAA_GPIO_EDGE_RISING:
case MRAA_GPIO_EDGE_RISING:
length = snprintf(bu, sizeof(bu), "rising");
break;
case MAA_GPIO_EDGE_FALLING:
case MRAA_GPIO_EDGE_FALLING:
length = snprintf(bu, sizeof(bu), "falling");
break;
default:
close(edge);
return MAA_ERROR_FEATURE_NOT_IMPLEMENTED;
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(edge, bu, length*sizeof(char)) == -1) {
fprintf(stderr, "Failed to write to edge\n");
close(edge);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(edge);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_gpio_isr(maa_gpio_context dev, gpio_edge_t mode, void (*fptr)(void *), void * args)
mraa_result_t
mraa_gpio_isr(mraa_gpio_context dev, gpio_edge_t mode, void (*fptr)(void *), void * args)
{
// we only allow one isr per maa_gpio_context
// we only allow one isr per mraa_gpio_context
if (dev->thread_id != 0) {
return MAA_ERROR_NO_RESOURCES;
return MRAA_ERROR_NO_RESOURCES;
}
if (MAA_SUCCESS != maa_gpio_edge_mode(dev, mode)) {
return MAA_ERROR_UNSPECIFIED;
if (MRAA_SUCCESS != mraa_gpio_edge_mode(dev, mode)) {
return MRAA_ERROR_UNSPECIFIED;
}
dev->isr = fptr;
dev->isr_args = args;
pthread_create (&dev->thread_id, NULL, maa_gpio_interrupt_handler, (void *) dev);
pthread_create (&dev->thread_id, NULL, mraa_gpio_interrupt_handler, (void *) dev);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_gpio_isr_exit(maa_gpio_context dev)
mraa_result_t
mraa_gpio_isr_exit(mraa_gpio_context dev)
{
maa_result_t ret = MAA_SUCCESS;
mraa_result_t ret = MRAA_SUCCESS;
// wasting our time, there is no isr to exit from
if (dev->thread_id == 0 && dev->isr_value_fp == -1) {
@@ -290,17 +290,17 @@ maa_gpio_isr_exit(maa_gpio_context dev)
}
// stop isr being useful
ret = maa_gpio_edge_mode(dev, MAA_GPIO_EDGE_NONE);
ret = mraa_gpio_edge_mode(dev, MRAA_GPIO_EDGE_NONE);
if ((dev->thread_id != 0) &&
(pthread_cancel(dev->thread_id) != 0)) {
ret = MAA_ERROR_INVALID_HANDLE;
ret = MRAA_ERROR_INVALID_HANDLE;
}
// close the filehandle in case it's still open
if (dev->isr_value_fp != -1) {
if (close(dev->isr_value_fp) != 0) {
ret = MAA_ERROR_INVALID_PARAMETER;
ret = MRAA_ERROR_INVALID_PARAMETER;
}
}
@@ -316,8 +316,8 @@ maa_gpio_isr_exit(maa_gpio_context dev)
return ret;
}
maa_result_t
maa_gpio_mode(maa_gpio_context dev, gpio_mode_t mode)
mraa_result_t
mraa_gpio_mode(mraa_gpio_context dev, gpio_mode_t mode)
{
if (dev->value_fp != -1) {
close(dev->value_fp);
@@ -330,44 +330,44 @@ maa_gpio_mode(maa_gpio_context dev, gpio_mode_t mode)
int drive = open(filepath, O_WRONLY);
if (drive == -1) {
fprintf(stderr, "Failed to open drive for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length;
switch(mode) {
case MAA_GPIO_STRONG:
case MRAA_GPIO_STRONG:
length = snprintf(bu, sizeof(bu), "strong");
break;
case MAA_GPIO_PULLUP:
case MRAA_GPIO_PULLUP:
length = snprintf(bu, sizeof(bu), "pullup");
break;
case MAA_GPIO_PULLDOWN:
case MRAA_GPIO_PULLDOWN:
length = snprintf(bu, sizeof(bu), "pulldown");
break;
case MAA_GPIO_HIZ:
case MRAA_GPIO_HIZ:
length = snprintf(bu, sizeof(bu), "hiz");
break;
default:
close(drive);
return MAA_ERROR_FEATURE_NOT_IMPLEMENTED;
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (write(drive, bu, length*sizeof(char)) == -1) {
fprintf(stderr, "Failed to write to drive mode!\n");
close(drive);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(drive);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_gpio_dir(maa_gpio_context dev, gpio_dir_t dir)
mraa_result_t
mraa_gpio_dir(mraa_gpio_context dev, gpio_dir_t dir)
{
if (dev == NULL) {
return MAA_ERROR_INVALID_HANDLE;
return MRAA_ERROR_INVALID_HANDLE;
}
if (dev->value_fp != -1) {
close(dev->value_fp);
@@ -380,45 +380,45 @@ maa_gpio_dir(maa_gpio_context dev, gpio_dir_t dir)
if (direction == -1) {
fprintf(stderr, "Failed to open direction for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length;
int out_switch = 0;
switch(dir) {
case MAA_GPIO_OUT:
case MRAA_GPIO_OUT:
length = snprintf(bu, sizeof(bu), "out");
out_switch = 1;
break;
case MAA_GPIO_IN:
case MRAA_GPIO_IN:
length = snprintf(bu, sizeof(bu), "in");
break;
default:
close(direction);
return MAA_ERROR_FEATURE_NOT_IMPLEMENTED;
return MRAA_ERROR_FEATURE_NOT_IMPLEMENTED;
}
if (dev->phy_pin >= 0) {
maa_result_t swap_res = maa_swap_complex_gpio(dev->phy_pin, out_switch);
if (swap_res != MAA_SUCCESS)
mraa_result_t swap_res = mraa_swap_complex_gpio(dev->phy_pin, out_switch);
if (swap_res != MRAA_SUCCESS)
return swap_res;
}
if (write(direction, bu, length*sizeof(char)) == -1) {
close(direction);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(direction);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
int
maa_gpio_read(maa_gpio_context dev)
mraa_gpio_read(mraa_gpio_context dev)
{
if (dev->value_fp == -1) {
if (maa_gpio_get_valfp(dev) != MAA_SUCCESS) {
if (mraa_gpio_get_valfp(dev) != MRAA_SUCCESS) {
fprintf(stderr, "Failed to get value file pointer\n");
}
}
@@ -436,35 +436,35 @@ maa_gpio_read(maa_gpio_context dev)
return ret;
}
maa_result_t
maa_gpio_write(maa_gpio_context dev, int value)
mraa_result_t
mraa_gpio_write(mraa_gpio_context dev, int value)
{
if (dev->mmap == 1)
return maa_gpio_write_register(dev,value);
return mraa_gpio_write_register(dev,value);
if (dev->value_fp == -1) {
maa_gpio_get_valfp(dev);
mraa_gpio_get_valfp(dev);
}
if (lseek(dev->value_fp, 0, SEEK_SET) == -1) {
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
int length = snprintf(bu, sizeof(bu), "%d", value);
if (write(dev->value_fp, bu, length*sizeof(char)) == -1) {
return MAA_ERROR_INVALID_HANDLE;
return MRAA_ERROR_INVALID_HANDLE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
static maa_result_t
maa_gpio_unexport_force(maa_gpio_context dev)
static mraa_result_t
mraa_gpio_unexport_force(mraa_gpio_context dev)
{
int unexport = open(SYSFS_CLASS_GPIO "/unexport", O_WRONLY);
if (unexport == -1) {
fprintf(stderr, "Failed to open unexport for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char bu[MAX_SIZE];
@@ -472,55 +472,55 @@ maa_gpio_unexport_force(maa_gpio_context dev)
if (write(unexport, bu, length*sizeof(char)) == -1) {
fprintf(stderr, "Failed to write to unexport\n");
close(unexport);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(unexport);
maa_gpio_isr_exit(dev);
return MAA_SUCCESS;
mraa_gpio_isr_exit(dev);
return MRAA_SUCCESS;
}
static maa_result_t
maa_gpio_unexport(maa_gpio_context dev)
static mraa_result_t
mraa_gpio_unexport(mraa_gpio_context dev)
{
if(dev->owner) {
return maa_gpio_unexport_force(dev);
return mraa_gpio_unexport_force(dev);
}
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
maa_result_t
maa_gpio_close(maa_gpio_context dev)
mraa_result_t
mraa_gpio_close(mraa_gpio_context dev)
{
if (dev->value_fp != -1) {
close(dev->value_fp);
}
maa_gpio_unexport(dev);
mraa_gpio_unexport(dev);
free(dev);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_gpio_owner(maa_gpio_context dev, maa_boolean_t own)
mraa_result_t
mraa_gpio_owner(mraa_gpio_context dev, mraa_boolean_t own)
{
if (dev == NULL)
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
dev->owner = own;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_gpio_use_mmaped(maa_gpio_context dev, maa_boolean_t mmap_en)
mraa_result_t
mraa_gpio_use_mmaped(mraa_gpio_context dev, mraa_boolean_t mmap_en)
{
if (dev == NULL) {
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
if (maa_pin_mode_test(dev->phy_pin, MAA_PIN_FAST_GPIO) == 0)
return MAA_ERROR_NO_RESOURCES;
if (mraa_pin_mode_test(dev->phy_pin, MRAA_PIN_FAST_GPIO) == 0)
return MRAA_ERROR_NO_RESOURCES;
maa_mmap_pin_t *mmp = maa_setup_mmap_gpio(dev->phy_pin);
mraa_mmap_pin_t *mmp = mraa_setup_mmap_gpio(dev->phy_pin);
if (mmp == NULL)
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
if (mmap_en == 1) {
if (dev->mmap == 0) {
@@ -529,15 +529,15 @@ maa_gpio_use_mmaped(maa_gpio_context dev, maa_boolean_t mmap_en)
fd = open(mmp->mem_dev, O_RDWR);
if (fd < 1) {
fprintf(stderr, "Unable to open memory device\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
dev->reg_sz = mmp->mem_sz;
dev->reg = mmap(NULL, dev->reg_sz, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
dev->reg_bit_pos = mmp->bit_pos;
dev->mmap = 1;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
return MAA_ERROR_INVALID_PARAMETER;
return MRAA_ERROR_INVALID_PARAMETER;
}
if (mmap_en == 0) {
@@ -545,8 +545,8 @@ maa_gpio_use_mmaped(maa_gpio_context dev, maa_boolean_t mmap_en)
munmap(dev->reg, dev->reg_sz);
dev->mmap = 0;
}
return MAA_ERROR_INVALID_PARAMETER;
return MRAA_ERROR_INVALID_PARAMETER;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}

58
src/i2c/i2c.c
View File

@@ -24,7 +24,7 @@
#include "i2c.h"
#include "smbus.h"
#include "maa_internal.h"
#include "mraa_internal.h"
struct _i2c {
/*@{*/
@@ -34,10 +34,10 @@ struct _i2c {
/*@}*/
};
maa_i2c_context
maa_i2c_init(int bus)
mraa_i2c_context
mraa_i2c_init(int bus)
{
int checked_pin = maa_setup_i2c(bus);
int checked_pin = mraa_setup_i2c(bus);
if (checked_pin < 0) {
switch(checked_pin) {
case -1:
@@ -52,13 +52,13 @@ maa_i2c_init(int bus)
default: return NULL;
}
}
return maa_i2c_init_raw((unsigned int) checked_pin);
return mraa_i2c_init_raw((unsigned int) checked_pin);
}
maa_i2c_context
maa_i2c_init_raw(unsigned int bus)
mraa_i2c_context
mraa_i2c_init_raw(unsigned int bus)
{
maa_i2c_context dev = (maa_i2c_context) malloc(sizeof(struct _i2c));
mraa_i2c_context dev = (mraa_i2c_context) malloc(sizeof(struct _i2c));
if (dev == NULL)
return NULL;
@@ -70,18 +70,18 @@ maa_i2c_init_raw(unsigned int bus)
return dev;
}
maa_result_t
maa_i2c_frequency(maa_i2c_context dev, int hz)
mraa_result_t
mraa_i2c_frequency(mraa_i2c_context dev, int hz)
{
dev->hz = hz;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
int
maa_i2c_read(maa_i2c_context dev, uint8_t* data, int length)
mraa_i2c_read(mraa_i2c_context dev, uint8_t* data, int length)
{
// this is the read(3) syscall not maa_i2c_read()
// this is the read(3) syscall not mraa_i2c_read()
if (read(dev->fh, data, length) == length) {
return length;
}
@@ -89,7 +89,7 @@ maa_i2c_read(maa_i2c_context dev, uint8_t* data, int length)
}
uint8_t
maa_i2c_read_byte(maa_i2c_context dev)
mraa_i2c_read_byte(mraa_i2c_context dev)
{
uint8_t byte = i2c_smbus_read_byte(dev->fh);
if (byte < 0) {
@@ -98,40 +98,40 @@ maa_i2c_read_byte(maa_i2c_context dev)
return byte;
}
maa_result_t
maa_i2c_write(maa_i2c_context dev, const uint8_t* data, int length)
mraa_result_t
mraa_i2c_write(mraa_i2c_context dev, const uint8_t* data, int length)
{
if (i2c_smbus_write_i2c_block_data(dev->fh, data[0], length-1, (uint8_t*) data+1) < 0) {
fprintf(stderr, "Failed to write to i2c\n");
return MAA_ERROR_INVALID_HANDLE;
return MRAA_ERROR_INVALID_HANDLE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_i2c_write_byte(maa_i2c_context dev, const uint8_t data)
mraa_result_t
mraa_i2c_write_byte(mraa_i2c_context dev, const uint8_t data)
{
if (i2c_smbus_write_byte(dev->fh, data) < 0) {
fprintf(stderr, "Failed to write to i2c\n");
return MAA_ERROR_INVALID_HANDLE;
return MRAA_ERROR_INVALID_HANDLE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_i2c_address(maa_i2c_context dev, int addr)
mraa_result_t
mraa_i2c_address(mraa_i2c_context dev, int addr)
{
dev->addr = addr;
if (ioctl(dev->fh, I2C_SLAVE_FORCE, addr) < 0) {
fprintf(stderr, "Failed to set slave address %d\n", addr);
return MAA_ERROR_INVALID_HANDLE;
return MRAA_ERROR_INVALID_HANDLE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_i2c_stop(maa_i2c_context dev)
mraa_result_t
mraa_i2c_stop(mraa_i2c_context dev)
{
free(dev);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}

48
src/intel_galileo_rev_d.c
View File

@@ -28,10 +28,10 @@
#include "common.h"
#include "intel_galileo_rev_d.h"
maa_board_t*
maa_intel_galileo_rev_d()
mraa_board_t*
mraa_intel_galileo_rev_d()
{
maa_board_t* b = (maa_board_t*) malloc(sizeof(maa_board_t));
mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
if (b == NULL)
return NULL;
@@ -39,11 +39,11 @@ maa_intel_galileo_rev_d()
b->gpio_count = 14;
b->aio_count = 6;
b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_REV_D_PINCOUNT);
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_REV_D_PINCOUNT);
//GPIO IO0 - IO10
strncpy(b->pins[0].name, "IO0", 8);
b->pins[0].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[0].gpio.pinmap = 50;
b->pins[0].gpio.parent_id = 0;
b->pins[0].gpio.mux_total = 1;
@@ -51,14 +51,14 @@ maa_intel_galileo_rev_d()
b->pins[0].gpio.mux[0].value = 1;
strncpy(b->pins[1].name, "IO1", 8);
b->pins[1].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[1].gpio.pinmap = 51;
b->pins[1].gpio.mux_total = 1;
b->pins[1].gpio.mux[0].pin = 41;
b->pins[1].gpio.mux[0].value = 1;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (maa_pincapabilities_t) {1,1,0,1,0,0,0};
b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,1,0,0,0};
b->pins[2].gpio.pinmap = 32;
b->pins[2].gpio.mux_total = 1;
b->pins[2].gpio.mux[0].pin = 31;
@@ -74,7 +74,7 @@ maa_intel_galileo_rev_d()
b->pins[2].mmap.bit_pos = 6;
strncpy(b->pins[3].name, "IO3", 8);
b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,1,0,0,0};
b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,1,0,0,0};
b->pins[3].gpio.pinmap = 18;
b->pins[3].gpio.mux_total = 1;
b->pins[3].gpio.mux[0].pin = 30;
@@ -96,12 +96,12 @@ maa_intel_galileo_rev_d()
strncpy(b->pins[4].name, "IO4", 8);
b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[4].gpio.pinmap = 28;
b->pins[4].gpio.mux_total = 0;
strncpy(b->pins[5].name, "IO5", 8);
b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[5].gpio.pinmap = 17;
b->pins[5].gpio.mux_total = 0;
b->pins[5].pwm.pinmap = 5;
@@ -110,24 +110,24 @@ maa_intel_galileo_rev_d()
strncpy(b->pins[6].name, "IO6", 8);
b->pins[6].gpio.pinmap = 24;
b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[6].gpio.mux_total = 0;
b->pins[6].pwm.pinmap = 6;
b->pins[6].pwm.parent_id = 0;
b->pins[6].pwm.mux_total = 0;
strncpy(b->pins[7].name, "IO7", 8);
b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[7].gpio.pinmap = 27;
b->pins[7].gpio.mux_total = 0;
strncpy(b->pins[8].name, "IO8", 8);
b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[8].gpio.pinmap = 26;
b->pins[8].gpio.mux_total = 0;
strncpy(b->pins[9].name, "IO9", 8);
b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[9].gpio.pinmap = 19;
b->pins[9].gpio.mux_total = 0;
b->pins[9].pwm.pinmap = 1;
@@ -135,7 +135,7 @@ maa_intel_galileo_rev_d()
b->pins[9].pwm.mux_total = 0;
strncpy(b->pins[10].name, "IO10", 8);
b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[10].gpio.pinmap = 16;
b->pins[10].gpio.mux_total = 1;
b->pins[10].gpio.mux[0].pin = 42;
@@ -151,7 +151,7 @@ maa_intel_galileo_rev_d()
b->pins[10].spi.mux[0].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[11].gpio.pinmap = 25;
b->pins[11].gpio.mux_total = 1;
b->pins[11].gpio.mux[0].pin = 43;
@@ -167,7 +167,7 @@ maa_intel_galileo_rev_d()
b->pins[11].spi.mux[0].value = 0;
strncpy(b->pins[12].name, "IO12", 8);
b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[12].gpio.pinmap = 38;
b->pins[12].gpio.mux_total = 1;
b->pins[12].gpio.mux[0].pin = 54;
@@ -178,7 +178,7 @@ maa_intel_galileo_rev_d()
b->pins[12].spi.mux[0].value = 0;
strncpy(b->pins[13].name, "IO13", 8);
b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[13].gpio.pinmap = 39;
b->pins[13].gpio.mux_total = 1;
b->pins[13].gpio.mux[0].pin = 55;
@@ -189,7 +189,7 @@ maa_intel_galileo_rev_d()
b->pins[13].spi.mux[0].value = 0;
strncpy(b->pins[14].name, "A0", 8);
b->pins[14].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[14].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[14].gpio.pinmap = 44;
b->pins[14].gpio.mux_total = 1;
b->pins[14].gpio.mux[0].pin = 37;
@@ -200,7 +200,7 @@ maa_intel_galileo_rev_d()
b->pins[14].aio.mux[0].value = 0;
strncpy(b->pins[15].name, "A1", 8);
b->pins[15].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[15].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[15].gpio.pinmap = 45;
b->pins[15].gpio.mux_total = 1;
b->pins[15].gpio.mux[0].pin = 36;
@@ -211,7 +211,7 @@ maa_intel_galileo_rev_d()
b->pins[15].aio.mux[0].value = 0;
strncpy(b->pins[16].name, "A2", 8);
b->pins[16].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[16].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[16].gpio.pinmap = 46;
b->pins[16].gpio.mux_total = 1;
b->pins[16].gpio.mux[0].pin = 23;
@@ -222,7 +222,7 @@ maa_intel_galileo_rev_d()
b->pins[16].aio.mux[0].value = 0;
strncpy(b->pins[17].name, "A3", 8);
b->pins[17].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[17].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,1};
b->pins[17].gpio.pinmap = 47;
b->pins[17].gpio.mux_total = 1;
b->pins[17].gpio.mux[0].pin = 22;
@@ -233,7 +233,7 @@ maa_intel_galileo_rev_d()
b->pins[17].aio.mux[0].value = 0;
strncpy(b->pins[18].name, "A4", 8);
b->pins[18].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[18].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[18].gpio.pinmap = 48;
b->pins[18].gpio.mux_total = 2;
b->pins[18].gpio.mux[0].pin = 29;
@@ -252,7 +252,7 @@ maa_intel_galileo_rev_d()
b->pins[18].aio.mux[1].value = 0;
strncpy(b->pins[19].name, "A5", 8);
b->pins[19].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[19].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,1,1};
b->pins[19].gpio.pinmap = 49;
b->pins[19].gpio.mux_total = 2;
b->pins[19].gpio.mux[0].pin = 29;

88
src/intel_galileo_rev_g.c
View File

@@ -29,10 +29,10 @@
#include "common.h"
#include "intel_galileo_rev_g.h"
maa_board_t*
maa_intel_galileo_gen2()
mraa_board_t*
mraa_intel_galileo_gen2()
{
maa_board_t* b = (maa_board_t*) malloc(sizeof(maa_board_t));
mraa_board_t* b = (mraa_board_t*) malloc(sizeof(mraa_board_t));
if (b == NULL)
return NULL;
@@ -40,41 +40,41 @@ maa_intel_galileo_gen2()
b->gpio_count = 14;
b->aio_count = 6;
b->pins = (maa_pininfo_t*) malloc(sizeof(maa_pininfo_t)*MAA_INTEL_GALILEO_GEN_2_PINCOUNT);
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t)*MRAA_INTEL_GALILEO_GEN_2_PINCOUNT);
strncpy(b->pins[0].name, "IO0", 8);
b->pins[0].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[0].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[0].gpio.pinmap = 11;
b->pins[0].gpio.parent_id = 0;
b->pins[0].gpio.mux_total = 0;
b->pins[0].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[0].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[0].gpio.output_enable = 32;
b->pins[0].gpio.pullup_enable = 33;
strncpy(b->pins[1].name, "IO1", 8);
b->pins[1].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[1].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[1].gpio.pinmap = 12;
b->pins[1].gpio.parent_id = 0;
b->pins[1].gpio.mux_total = 1;
b->pins[1].gpio.mux[0].pin = 45;
b->pins[1].gpio.mux[0].value = 0;
b->pins[1].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[1].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[1].gpio.output_enable = 28;
b->pins[1].gpio.pullup_enable = 29;
strncpy(b->pins[2].name, "IO2", 8);
b->pins[2].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[2].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[2].gpio.pinmap = 13;
b->pins[2].gpio.parent_id = 0;
b->pins[2].gpio.mux_total = 1;
b->pins[2].gpio.mux[0].pin = 77;
b->pins[2].gpio.mux[0].value = 0;
b->pins[2].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[2].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[2].gpio.output_enable = 34;
b->pins[2].gpio.pullup_enable = 35;
strncpy(b->pins[3].name, "IO3", 8);
b->pins[3].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[3].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[3].gpio.pinmap = 14;
b->pins[3].gpio.parent_id = 0;
b->pins[3].gpio.mux_total = 2;
@@ -82,7 +82,7 @@ maa_intel_galileo_gen2()
b->pins[3].gpio.mux[0].value = 0;
b->pins[3].gpio.mux[1].pin = 64;
b->pins[3].gpio.mux[1].value = 0;
b->pins[3].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[3].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[3].gpio.output_enable = 16;
b->pins[3].gpio.pullup_enable = 17;
b->pins[3].pwm.pinmap = 1;
@@ -97,22 +97,22 @@ maa_intel_galileo_gen2()
//ADD Othher Bits?
strncpy(b->pins[4].name, "IO4", 8);
b->pins[4].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[4].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[4].gpio.pinmap = 6;
b->pins[4].gpio.parent_id = 0;
b->pins[4].gpio.mux_total = 0;
b->pins[4].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[4].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[4].gpio.output_enable = 36;
b->pins[4].gpio.pullup_enable = 37;
strncpy(b->pins[5].name, "IO5", 8);
b->pins[5].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[5].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[5].gpio.pinmap = 0;
b->pins[5].gpio.parent_id = 0;
b->pins[5].gpio.mux_total = 1;
b->pins[5].gpio.mux[0].pin = 66;
b->pins[5].gpio.mux[0].value = 0;
b->pins[5].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[5].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[5].gpio.output_enable = 18;
b->pins[5].gpio.pullup_enable = 19;
b->pins[5].pwm.pinmap = 4;
@@ -124,13 +124,13 @@ maa_intel_galileo_gen2()
b->pins[5].pwm.mux[1].value = 0;
strncpy(b->pins[6].name, "IO6", 8);
b->pins[6].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[6].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[6].gpio.pinmap = 1;
b->pins[6].gpio.parent_id = 0;
b->pins[6].gpio.mux_total = 1;
b->pins[6].gpio.mux[0].pin = 68;
b->pins[6].gpio.mux[0].value = 0;
b->pins[6].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[6].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[6].gpio.output_enable = 20;
b->pins[6].gpio.pullup_enable = 21;
b->pins[6].pwm.pinmap = 5;
@@ -142,29 +142,29 @@ maa_intel_galileo_gen2()
b->pins[6].pwm.mux[1].value = 0;
strncpy(b->pins[7].name, "IO7", 8);
b->pins[7].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[7].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[7].gpio.pinmap = 38;
b->pins[7].gpio.parent_id = 0;
b->pins[7].gpio.mux_total = 0;
b->pins[7].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[7].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[7].gpio.pullup_enable = 39;
strncpy(b->pins[8].name, "IO8", 8);
b->pins[8].capabilites = (maa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[8].capabilites = (mraa_pincapabilities_t) {1,1,0,0,0,0,0};
b->pins[8].gpio.pinmap = 40;
b->pins[8].gpio.parent_id = 0;
b->pins[8].gpio.mux_total = 0;
b->pins[8].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[8].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[8].gpio.pullup_enable = 41;
strncpy(b->pins[9].name, "IO9", 8);
b->pins[9].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[9].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[9].gpio.pinmap = 4;
b->pins[9].gpio.parent_id = 0;
b->pins[9].gpio.mux_total = 1;
b->pins[9].gpio.mux[0].pin = 70;
b->pins[9].gpio.mux[0].value = 0;
b->pins[9].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[9].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[9].gpio.output_enable = 22;
b->pins[9].gpio.pullup_enable = 23;
b->pins[9].pwm.pinmap = 7;
@@ -176,13 +176,13 @@ maa_intel_galileo_gen2()
b->pins[9].pwm.mux[1].value = 0;
strncpy(b->pins[10].name, "IO10", 8);
b->pins[10].capabilites = (maa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[10].capabilites = (mraa_pincapabilities_t) {1,1,1,0,0,0,0};
b->pins[10].gpio.pinmap = 10;
b->pins[10].gpio.parent_id = 0;
b->pins[10].gpio.mux_total = 1;
b->pins[10].gpio.mux[0].pin = 74;
b->pins[10].gpio.mux[0].value = 0;
b->pins[10].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[10].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[10].gpio.output_enable = 26;
b->pins[10].gpio.pullup_enable = 27;
b->pins[10].pwm.pinmap = 11;
@@ -194,7 +194,7 @@ maa_intel_galileo_gen2()
b->pins[10].pwm.mux[1].value = 0;
strncpy(b->pins[11].name, "IO11", 8);
b->pins[11].capabilites = (maa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[11].capabilites = (mraa_pincapabilities_t) {1,1,1,0,1,0,0};
b->pins[11].gpio.pinmap = 5;
b->pins[11].gpio.parent_id = 0;
b->pins[11].gpio.mux_total = 2;
@@ -202,7 +202,7 @@ maa_intel_galileo_gen2()
b->pins[11].gpio.mux[0].value = 0;
b->pins[11].gpio.mux[1].pin = 44;
b->pins[11].gpio.mux[1].value = 0;
b->pins[11].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[11].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[11].gpio.output_enable = 24;
b->pins[11].gpio.pullup_enable = 25;
b->pins[11].pwm.pinmap = 9;
@@ -224,11 +224,11 @@ maa_intel_galileo_gen2()
b->pins[11].pwm.mux[2].value = 0;
strncpy(b->pins[12].name, "IO12", 8);
b->pins[12].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[12].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[12].gpio.pinmap = 15;
b->pins[12].gpio.parent_id = 0;
b->pins[12].gpio.mux_total = 0;
b->pins[12].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[12].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[12].gpio.output_enable = 42;
b->pins[12].gpio.pullup_enable = 43;
b->pins[12].spi.pinmap = 1;
@@ -238,13 +238,13 @@ maa_intel_galileo_gen2()
// THIS NEEDS TESTING UNSURE IF MOSI WILL BE EXPOSED.
strncpy(b->pins[13].name, "IO13", 8);
b->pins[13].capabilites = (maa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[13].capabilites = (mraa_pincapabilities_t) {1,1,0,0,1,0,0};
b->pins[13].gpio.pinmap = 7;
b->pins[13].gpio.parent_id = 0;
b->pins[13].gpio.mux_total = 1;
b->pins[13].gpio.mux[0].pin = 46;
b->pins[13].gpio.mux[0].value = 0;
b->pins[13].gpio.complex_cap = (maa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[13].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,1,0,1,1};
b->pins[13].gpio.output_enable = 30;
b->pins[13].gpio.pullup_enable = 31;
b->pins[13].spi.pinmap = 1;
@@ -256,36 +256,36 @@ maa_intel_galileo_gen2()
//ANALOG
strncpy(b->pins[14].name, "A0", 8);
b->pins[14].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[14].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[14].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[14].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[14].gpio.pullup_enable = 49;
b->pins[14].aio.pinmap = 0;
b->pins[14].aio.mux_total = 0;
strncpy(b->pins[15].name, "A1", 8);
b->pins[15].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[15].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[15].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[15].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[15].gpio.pullup_enable = 51;
b->pins[15].aio.pinmap = 1;
b->pins[15].aio.mux_total = 0;
strncpy(b->pins[16].name, "A2", 8);
b->pins[16].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[16].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[16].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[16].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[16].gpio.pullup_enable = 53;
b->pins[16].aio.pinmap = 2;
b->pins[16].aio.mux_total = 0;
strncpy(b->pins[17].name, "A3", 8);
b->pins[17].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[17].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[17].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,0,1};
b->pins[17].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[17].gpio.pullup_enable = 55;
b->pins[17].aio.pinmap = 3;
b->pins[17].aio.mux_total = 0;
strncpy(b->pins[18].name, "A4", 8);
b->pins[18].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1};
b->pins[18].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[18].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,1};
b->pins[18].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[18].gpio.pullup_enable = 57;
b->pins[18].i2c.pinmap = 1;
b->pins[18].i2c.mux_total = 1;
@@ -299,8 +299,8 @@ maa_intel_galileo_gen2()
b->pins[18].aio.mux[1].value = 0;
strncpy(b->pins[19].name, "A5", 8);
b->pins[19].capabilites = (maa_pincapabilities_t) {1,0,0,0,0,1,1};
b->pins[19].gpio.complex_cap = (maa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[19].capabilites = (mraa_pincapabilities_t) {1,0,0,0,0,1,1};
b->pins[19].gpio.complex_cap = (mraa_pin_cap_complex_t) {1,0,0,1,1};
b->pins[19].gpio.pullup_enable = 59;
b->pins[19].i2c.pinmap = 1;
b->pins[19].i2c.mux_total = 1;

16
src/javascript/CMakeLists.txt
View File

@@ -14,23 +14,23 @@ include_directories (
set (CMAKE_CXX_FLAGS -DBUILDING_NODE_EXTENSION)
# SWIG treats SWIG_FLAGS as a list and not a string so semicolon seperation is required
set_source_files_properties (maajs.i PROPERTIES SWIG_FLAGS "-node;-I${CMAKE_BINARY_DIR}/src")
set_source_files_properties (maajs.i PROPERTIES CPLUSPLUS ON)
set_source_files_properties (mraajs.i PROPERTIES SWIG_FLAGS "-node;-I${CMAKE_BINARY_DIR}/src")
set_source_files_properties (mraajs.i PROPERTIES CPLUSPLUS ON)
swig_add_module (maajs javascript maajs.i ${maa_LIB_SRCS})
swig_link_libraries (maajs ${NODE_LIBRARIES})
swig_add_module (mraajs javascript mraajs.i ${mraa_LIB_SRCS})
swig_link_libraries (mraajs ${NODE_LIBRARIES})
if (DOXYGEN_FOUND)
foreach (_file ${DOCFILES})
add_dependencies (${SWIG_MODULE_maajs_REAL_NAME} ${_file}doc_i)
add_dependencies (${SWIG_MODULE_mraajs_REAL_NAME} ${_file}doc_i)
endforeach ()
endif ()
set_target_properties (maajs PROPERTIES
set_target_properties (mraajs PROPERTIES
PREFIX ""
SUFFIX ".node"
)
install (FILES ${CMAKE_CURRENT_SOURCE_DIR}/package.json
${CMAKE_CURRENT_BINARY_DIR}/maajs.node
DESTINATION lib/node_modules/maajs)
${CMAKE_CURRENT_BINARY_DIR}/mraajs.node
DESTINATION lib/node_modules/mraajs)

5
src/javascript/maajs.i
View File

@@ -1,5 +0,0 @@
%module (docstring="Javascript interface to libmaa") maajs
%feature("autodoc", "3");
%include ../maa.i

5
src/javascript/mraajs.i Normal file
View File

@@ -0,0 +1,5 @@
%module (docstring="Javascript interface to libmraa") mraajs
%feature("autodoc", "3");
%include ../mraa.i

4
src/javascript/package.json
View File

@@ -1,6 +1,6 @@
{
"name" : "maajs",
"main" : "./maajs.node",
"name" : "mraajs",
"main" : "./mraajs.node",
"engines": {
"node": ">= 1.0.x"
},

226
src/maa.c → src/mraa.c
View File

@@ -28,35 +28,35 @@
#include <sched.h>
#include <string.h>
#include "maa_internal.h"
#include "mraa_internal.h"
#include "intel_galileo_rev_d.h"
#include "intel_galileo_rev_g.h"
#include "gpio.h"
#include "version.h"
//static maa_pininfo_t* pindata;
static maa_board_t* plat = NULL;
static maa_platform_t platform_type = MAA_UNKNOWN_PLATFORM;
//static mraa_pininfo_t* pindata;
static mraa_board_t* plat = NULL;
static mraa_platform_t platform_type = MRAA_UNKNOWN_PLATFORM;
const char *
maa_get_version()
mraa_get_version()
{
return gVERSION;
}
#ifdef SWIG
maa_result_t
maa_init()
mraa_result_t
mraa_init()
#else
maa_result_t __attribute__((constructor))
maa_init()
mraa_result_t __attribute__((constructor))
mraa_init()
#endif
{
/** Once more board definitions have been added,
* A method for detecting them will need to be devised.
*/
if (plat != NULL) {
return MAA_ERROR_PLATFORM_ALREADY_INITIALISED;
return MRAA_ERROR_PLATFORM_ALREADY_INITIALISED;
}
#ifdef SWIGPYTHON
// Initialise python threads, this allows use to grab the GIL when we are
@@ -72,9 +72,9 @@ maa_init()
if (fh != NULL) {
if (getline(&line, &len, fh) != -1) {
if (strncmp(line, "GalileoGen2", 10) == 0) {
platform_type = MAA_INTEL_GALILEO_GEN2;
platform_type = MRAA_INTEL_GALILEO_GEN2;
} else {
platform_type = MAA_INTEL_GALILEO_GEN1;
platform_type = MRAA_INTEL_GALILEO_GEN1;
}
}
}
@@ -82,22 +82,22 @@ maa_init()
fclose(fh);
switch(platform_type) {
case MAA_INTEL_GALILEO_GEN2:
plat = maa_intel_galileo_gen2();
case MRAA_INTEL_GALILEO_GEN2:
plat = mraa_intel_galileo_gen2();
break;
case MAA_INTEL_GALILEO_GEN1:
plat = maa_intel_galileo_rev_d();
case MRAA_INTEL_GALILEO_GEN1:
plat = mraa_intel_galileo_rev_d();
break;
default:
plat = maa_intel_galileo_rev_d();
fprintf(stderr, "Platform not found, initialising MAA_INTEL_GALILEO_GEN1\n");
plat = mraa_intel_galileo_rev_d();
fprintf(stderr, "Platform not found, initialising MRAA_INTEL_GALILEO_GEN1\n");
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
int
maa_set_priority(const unsigned int priority)
mraa_set_priority(const unsigned int priority)
{
struct sched_param sched_s;
@@ -112,24 +112,24 @@ maa_set_priority(const unsigned int priority)
return sched_setscheduler(0, SCHED_RR, &sched_s);
}
static maa_result_t
maa_setup_mux_mapped(maa_pin_t meta)
static mraa_result_t
mraa_setup_mux_mapped(mraa_pin_t meta)
{
int mi;
for (mi = 0; mi < meta.mux_total; mi++) {
maa_gpio_context mux_i;
mux_i = maa_gpio_init_raw(meta.mux[mi].pin);
mraa_gpio_context mux_i;
mux_i = mraa_gpio_init_raw(meta.mux[mi].pin);
if (mux_i == NULL)
return MAA_ERROR_INVALID_HANDLE;
maa_gpio_dir(mux_i, MAA_GPIO_OUT);
if (maa_gpio_write(mux_i, meta.mux[mi].value) != MAA_SUCCESS)
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_HANDLE;
mraa_gpio_dir(mux_i, MRAA_GPIO_OUT);
if (mraa_gpio_write(mux_i, meta.mux[mi].value) != MRAA_SUCCESS)
return MRAA_ERROR_INVALID_RESOURCE;
}
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
unsigned int
maa_setup_gpio(int pin)
mraa_setup_gpio(int pin)
{
if (plat == NULL)
return -1;
@@ -141,13 +141,13 @@ maa_setup_gpio(int pin)
return -1;
if (plat->pins[pin].gpio.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pin].gpio) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pin].gpio) != MRAA_SUCCESS)
return -1;
return plat->pins[pin].gpio.pinmap;
}
unsigned int
maa_setup_aio(int aio)
mraa_setup_aio(int aio)
{
if (plat == NULL)
return -3;
@@ -161,13 +161,13 @@ maa_setup_aio(int aio)
return -1;
if (plat->pins[pin].aio.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pin].aio) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pin].aio) != MRAA_SUCCESS)
return -1;
return plat->pins[pin].aio.pinmap;
}
unsigned int
maa_setup_i2c(int bus)
mraa_setup_i2c(int bus)
{
if (plat == NULL)
return -3;
@@ -183,19 +183,19 @@ maa_setup_i2c(int bus)
int pos = plat->i2c_bus[bus].sda;
if (plat->pins[pos].i2c.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pos].i2c) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
return -2;
pos = plat->i2c_bus[bus].scl;
if (plat->pins[pos].i2c.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pos].i2c) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pos].i2c) != MRAA_SUCCESS)
return -2;
return plat->i2c_bus[bus].bus_id;
}
maa_spi_bus_t*
maa_setup_spi(int bus)
mraa_spi_bus_t*
mraa_setup_spi(int bus)
{
if (plat == NULL)
return NULL;
@@ -211,25 +211,25 @@ maa_setup_spi(int bus)
int pos = plat->spi_bus[bus].sclk;
if (plat->pins[pos].spi.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pos].spi) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
return NULL;
pos = plat->spi_bus[bus].mosi;
if (plat->pins[pos].spi.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pos].spi) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
return NULL;
pos = plat->spi_bus[bus].miso;
if (plat->pins[pos].spi.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pos].spi) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pos].spi) != MRAA_SUCCESS)
return NULL;
maa_spi_bus_t *spi = &(plat->spi_bus[bus]);
mraa_spi_bus_t *spi = &(plat->spi_bus[bus]);
return spi;
}
maa_pin_t*
maa_setup_pwm(int pin)
mraa_pin_t*
mraa_setup_pwm(int pin)
{
if (plat == NULL)
return NULL;
@@ -238,85 +238,85 @@ maa_setup_pwm(int pin)
return NULL;
if (plat->pins[pin].capabilites.gpio == 1) {
maa_gpio_context mux_i;
mux_i = maa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
mraa_gpio_context mux_i;
mux_i = mraa_gpio_init_raw(plat->pins[pin].gpio.pinmap);
if (mux_i == NULL)
return NULL;
if (maa_gpio_dir(mux_i, MAA_GPIO_OUT) != MAA_SUCCESS)
if (mraa_gpio_dir(mux_i, MRAA_GPIO_OUT) != MRAA_SUCCESS)
return NULL;
// Current REV D quirk. //TODO GEN 2
if (maa_gpio_write(mux_i, 1) != MAA_SUCCESS)
if (mraa_gpio_write(mux_i, 1) != MRAA_SUCCESS)
return NULL;
if (maa_gpio_close(mux_i) != MAA_SUCCESS)
if (mraa_gpio_close(mux_i) != MRAA_SUCCESS)
return NULL;
}
if (plat->pins[pin].pwm.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pin].pwm) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pin].pwm) != MRAA_SUCCESS)
return NULL;
maa_pin_t *ret;
ret = (maa_pin_t*) malloc(sizeof(maa_pin_t));
mraa_pin_t *ret;
ret = (mraa_pin_t*) malloc(sizeof(mraa_pin_t));
ret->pinmap = plat->pins[pin].pwm.pinmap;
ret->parent_id = plat->pins[pin].pwm.parent_id;
return ret;
}
void
maa_result_print(maa_result_t result)
mraa_result_print(mraa_result_t result)
{
switch (result) {
case MAA_SUCCESS: fprintf(stderr, "MAA: SUCCESS\n");
case MRAA_SUCCESS: fprintf(stderr, "MRAA: SUCCESS\n");
break;
case MAA_ERROR_FEATURE_NOT_IMPLEMENTED:
fprintf(stderr, "MAA: Feature not implemented.\n");
case MRAA_ERROR_FEATURE_NOT_IMPLEMENTED:
fprintf(stderr, "MRAA: Feature not implemented.\n");
break;
case MAA_ERROR_FEATURE_NOT_SUPPORTED:
fprintf(stderr, "MAA: Feature not supported by Hardware.\n");
case MRAA_ERROR_FEATURE_NOT_SUPPORTED:
fprintf(stderr, "MRAA: Feature not supported by Hardware.\n");
break;
case MAA_ERROR_INVALID_VERBOSITY_LEVEL:
fprintf(stderr, "MAA: Invalid verbosity level.\n");
case MRAA_ERROR_INVALID_VERBOSITY_LEVEL:
fprintf(stderr, "MRAA: Invalid verbosity level.\n");
break;
case MAA_ERROR_INVALID_PARAMETER:
fprintf(stderr, "MAA: Invalid parameter.\n");
case MRAA_ERROR_INVALID_PARAMETER:
fprintf(stderr, "MRAA: Invalid parameter.\n");
break;
case MAA_ERROR_INVALID_HANDLE:
fprintf(stderr, "MAA: Invalid Handle.\n");
case MRAA_ERROR_INVALID_HANDLE:
fprintf(stderr, "MRAA: Invalid Handle.\n");
break;
case MAA_ERROR_NO_RESOURCES:
fprintf(stderr, "MAA: No resources.\n");
case MRAA_ERROR_NO_RESOURCES:
fprintf(stderr, "MRAA: No resources.\n");
break;
case MAA_ERROR_INVALID_RESOURCE:
fprintf(stderr, "MAA: Invalid resource.\n");
case MRAA_ERROR_INVALID_RESOURCE:
fprintf(stderr, "MRAA: Invalid resource.\n");
break;
case MAA_ERROR_INVALID_QUEUE_TYPE:
fprintf(stderr, "MAA: Invalid Queue Type.\n");
case MRAA_ERROR_INVALID_QUEUE_TYPE:
fprintf(stderr, "MRAA: Invalid Queue Type.\n");
break;
case MAA_ERROR_NO_DATA_AVAILABLE:
fprintf(stderr, "MAA: No Data available.\n");
case MRAA_ERROR_NO_DATA_AVAILABLE:
fprintf(stderr, "MRAA: No Data available.\n");
break;
case MAA_ERROR_INVALID_PLATFORM:
fprintf(stderr, "MAA: Platform not recognised.\n");
case MRAA_ERROR_INVALID_PLATFORM:
fprintf(stderr, "MRAA: Platform not recognised.\n");
break;
case MAA_ERROR_PLATFORM_NOT_INITIALISED:
fprintf(stderr, "MAA: Platform not initialised.\n");
case MRAA_ERROR_PLATFORM_NOT_INITIALISED:
fprintf(stderr, "MRAA: Platform not initialised.\n");
break;
case MAA_ERROR_PLATFORM_ALREADY_INITIALISED:
fprintf(stderr, "MAA: Platform already initialised.\n");
case MRAA_ERROR_PLATFORM_ALREADY_INITIALISED:
fprintf(stderr, "MRAA: Platform already initialised.\n");
break;
case MAA_ERROR_UNSPECIFIED:
fprintf(stderr, "MAA: Unspecified Error.\n");
case MRAA_ERROR_UNSPECIFIED:
fprintf(stderr, "MRAA: Unspecified Error.\n");
break;
default: fprintf(stderr, "MAA: Unrecognised error.\n");
default: fprintf(stderr, "MRAA: Unrecognised error.\n");
break;
}
}
maa_boolean_t
maa_pin_mode_test(int pin, maa_pinmodes_t mode)
mraa_boolean_t
mraa_pin_mode_test(int pin, mraa_pinmodes_t mode)
{
if (plat == NULL) {
maa_init();
mraa_init();
if (plat == NULL)
return 0;
}
@@ -324,31 +324,31 @@ maa_pin_mode_test(int pin, maa_pinmodes_t mode)
return 0;
switch(mode) {
case MAA_PIN_VALID:
case MRAA_PIN_VALID:
if (plat->pins[pin].capabilites.valid == 1)
return 1;
break;
case MAA_PIN_GPIO:
case MRAA_PIN_GPIO:
if (plat->pins[pin].capabilites.gpio ==1)
return 1;
break;
case MAA_PIN_PWM:
case MRAA_PIN_PWM:
if (plat->pins[pin].capabilites.pwm ==1)
return 1;
break;
case MAA_PIN_FAST_GPIO:
case MRAA_PIN_FAST_GPIO:
if (plat->pins[pin].capabilites.fast_gpio ==1)
return 1;
break;
case MAA_PIN_SPI:
case MRAA_PIN_SPI:
if (plat->pins[pin].capabilites.spi ==1)
return 1;
break;
case MAA_PIN_I2C:
case MRAA_PIN_I2C:
if (plat->pins[pin].capabilites.i2c ==1)
return 1;
break;
case MAA_PIN_AIO:
case MRAA_PIN_AIO:
if (pin < plat->aio_count)
pin = pin + plat->gpio_count;
if (plat->pins[pin].capabilites.aio ==1)
@@ -359,8 +359,8 @@ maa_pin_mode_test(int pin, maa_pinmodes_t mode)
return 0;
}
maa_mmap_pin_t*
maa_setup_mmap_gpio(int pin)
mraa_mmap_pin_t*
mraa_setup_mmap_gpio(int pin)
{
if (plat == NULL)
return NULL;
@@ -369,30 +369,30 @@ maa_setup_mmap_gpio(int pin)
return NULL;
if (plat->pins[pin].mmap.gpio.mux_total > 0)
if (maa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
return NULL;
if (maa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MAA_SUCCESS)
if (mraa_setup_mux_mapped(plat->pins[pin].mmap.gpio) != MRAA_SUCCESS)
return NULL;
maa_mmap_pin_t *ret = &(plat->pins[pin].mmap);
mraa_mmap_pin_t *ret = &(plat->pins[pin].mmap);
return ret;
}
maa_result_t
maa_swap_complex_gpio(int pin, int out)
mraa_result_t
mraa_swap_complex_gpio(int pin, int out)
{
if (plat == NULL)
return MAA_ERROR_INVALID_PLATFORM;
return MRAA_ERROR_INVALID_PLATFORM;
switch (platform_type) {
case MAA_INTEL_GALILEO_GEN2:
case MRAA_INTEL_GALILEO_GEN2:
if (plat->pins[pin].gpio.complex_cap.complex_pin != 1)
return MAA_SUCCESS;
return MRAA_SUCCESS;
if (plat->pins[pin].gpio.complex_cap.output_en == 1) {
maa_gpio_context output_e;
output_e = maa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
if (maa_gpio_dir(output_e, MAA_GPIO_OUT) != MAA_SUCCESS)
return MAA_ERROR_INVALID_RESOURCE;
mraa_gpio_context output_e;
output_e = mraa_gpio_init_raw(plat->pins[pin].gpio.output_enable);
if (mraa_gpio_dir(output_e, MRAA_GPIO_OUT) != MRAA_SUCCESS)
return MRAA_ERROR_INVALID_RESOURCE;
int output_val;
if (plat->pins[pin].gpio.complex_cap.output_en_high == 1)
output_val = out;
@@ -401,21 +401,21 @@ maa_swap_complex_gpio(int pin, int out)
output_val = 0;
else
output_val = 1;
if (maa_gpio_write(output_e, output_val) != MAA_SUCCESS)
return MAA_ERROR_INVALID_RESOURCE;
if (mraa_gpio_write(output_e, output_val) != MRAA_SUCCESS)
return MRAA_ERROR_INVALID_RESOURCE;
}
//if (plat->pins[pin].gpio.complex_cap.pullup_en == 1) {
// maa_gpio_context pullup_e;
// pullup_e = maa_gpio_init_raw(plat->pins[pin].gpio.pullup_enable);
// if (maa_gpio_mode(pullup_e, MAA_GPIO_HIZ) != MAA_SUCCESS)
// return MAA_ERROR_INVALID_RESOURCE;
// mraa_gpio_context pullup_e;
// pullup_e = mraa_gpio_init_raw(plat->pins[pin].gpio.pullup_enable);
// if (mraa_gpio_mode(pullup_e, MRAA_GPIO_HIZ) != MRAA_SUCCESS)
// return MRAA_ERROR_INVALID_RESOURCE;
//}
break;
default: return MAA_SUCCESS;
default: return MRAA_SUCCESS;
}
}
maa_platform_t maa_get_platform_type()
mraa_platform_t mraa_get_platform_type()
{
return platform_type;
}

12
src/maa.i → src/mraa.i
View File

@@ -19,17 +19,17 @@
%}
%init %{
//Adding maa_init() to the module initialisation process
maa_init();
//Adding mraa_init() to the module initialisation process
mraa_init();
%}
%rename(getVersion) maa_get_version;
%rename(getVersion) mraa_get_version;
%rename(setPriority) maa_set_priority;
%rename(setPriority) mraa_set_priority;
%rename(printError) maa_result_print(maa_result_t error);
%rename(printError) mraa_result_print(mraa_result_t error);
%rename(getPlatform) maa_get_platform_type;
%rename(getPlatform) mraa_get_platform_type;
%typemap(in) uint8_t = char;

6
src/maa.pc.cmake → src/mraa.pc.cmake
View File

@@ -3,9 +3,9 @@ exec_prefix=${prefix}
libdir=${exec_prefix}/lib@LIB_SUFFIX@
includedir=${prefix}/include
Name: maa
Name: mraa
Description: Low Level Skeleton Library for Communication
Version: @maa_VERSION_STRING@
Version: @mraa_VERSION_STRING@
Libs: -L${libdir} -lmaa
Libs: -L${libdir} -lmraa
Cflags: -I${includedir}

140
src/pwm/pwm.c
View File

@@ -27,7 +27,7 @@
#include <unistd.h>
#include "pwm.h"
#include "maa_internal.h"
#include "mraa_internal.h"
#define MAX_SIZE 64
#define SYSFS_PWM "/sys/class/pwm"
@@ -40,12 +40,12 @@ struct _pwm {
int pin; /**< the pin number, as known to the os. */
int chipid; /**< the chip id, which the pwm resides */
int duty_fp; /**< File pointer to duty file */
maa_boolean_t owner; /**< Owner of pwm context*/
mraa_boolean_t owner; /**< Owner of pwm context*/
/*@}*/
};
static int
maa_pwm_setup_duty_fp(maa_pwm_context dev)
mraa_pwm_setup_duty_fp(mraa_pwm_context dev)
{
char bu[MAX_SIZE];
snprintf(bu,MAX_SIZE, "/sys/class/pwm/pwmchip%d/pwm%d/duty_cycle", dev->chipid, dev->pin);
@@ -57,8 +57,8 @@ maa_pwm_setup_duty_fp(maa_pwm_context dev)
return 0;
}
static maa_result_t
maa_pwm_write_period(maa_pwm_context dev, int period)
static mraa_result_t
mraa_pwm_write_period(mraa_pwm_context dev, int period)
{
char bu[MAX_SIZE];
snprintf(bu,MAX_SIZE ,"/sys/class/pwm/pwmchip%d/pwm%d/period", dev->chipid, dev->pin);
@@ -66,34 +66,34 @@ maa_pwm_write_period(maa_pwm_context dev, int period)
int period_f = open(bu, O_RDWR);
if (period_f == -1) {
fprintf(stderr, "Failed to open period for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[MAX_SIZE];
int length = snprintf(out, MAX_SIZE, "%d", period);
if (write(period_f, out, length*sizeof(char)) == -1) {
close(period_f);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(period_f);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
static maa_result_t
maa_pwm_write_duty(maa_pwm_context dev, int duty)
static mraa_result_t
mraa_pwm_write_duty(mraa_pwm_context dev, int duty)
{
if (dev->duty_fp == -1) {
maa_pwm_setup_duty_fp(dev);
mraa_pwm_setup_duty_fp(dev);
}
char bu[64];
int length = sprintf(bu, "%d", duty);
if (write(dev->duty_fp, bu, length * sizeof(char)) == -1)
return MAA_ERROR_INVALID_RESOURCE;
return MAA_SUCCESS;
return MRAA_ERROR_INVALID_RESOURCE;
return MRAA_SUCCESS;
}
static int
maa_pwm_get_period(maa_pwm_context dev)
mraa_pwm_get_period(mraa_pwm_context dev)
{
char bu[MAX_SIZE];
char output[MAX_SIZE];
@@ -115,10 +115,10 @@ maa_pwm_get_period(maa_pwm_context dev)
}
static int
maa_pwm_get_duty(maa_pwm_context dev)
mraa_pwm_get_duty(mraa_pwm_context dev)
{
if (dev->duty_fp == -1) {
maa_pwm_setup_duty_fp(dev);
mraa_pwm_setup_duty_fp(dev);
} else {
lseek(dev->duty_fp, 0, SEEK_SET);
}
@@ -131,21 +131,21 @@ maa_pwm_get_duty(maa_pwm_context dev)
return ret;
}
maa_pwm_context
maa_pwm_init(int pin) {
maa_pin_t* pinm = maa_setup_pwm(pin);
mraa_pwm_context
mraa_pwm_init(int pin) {
mraa_pin_t* pinm = mraa_setup_pwm(pin);
if (pinm == NULL)
return NULL;
int chip = pinm->parent_id;
int pinn = pinm->pinmap;
free(pinm);
return maa_pwm_init_raw(chip,pinn);
return mraa_pwm_init_raw(chip,pinn);
}
maa_pwm_context
maa_pwm_init_raw(int chipin, int pin)
mraa_pwm_context
mraa_pwm_init_raw(int chipin, int pin)
{
maa_pwm_context dev = (maa_pwm_context) malloc(sizeof(struct _pwm));
mraa_pwm_context dev = (mraa_pwm_context) malloc(sizeof(struct _pwm));
if (dev == NULL)
return NULL;
dev->duty_fp = -1;
@@ -178,61 +178,61 @@ maa_pwm_init_raw(int chipin, int pin)
dev->owner = 1;
close(export_f);
}
maa_pwm_setup_duty_fp(dev);
mraa_pwm_setup_duty_fp(dev);
return dev;
}
maa_result_t
maa_pwm_write(maa_pwm_context dev, float percentage)
mraa_result_t
mraa_pwm_write(mraa_pwm_context dev, float percentage)
{
return maa_pwm_write_duty(dev, percentage * maa_pwm_get_period(dev));
return mraa_pwm_write_duty(dev, percentage * mraa_pwm_get_period(dev));
}
float
maa_pwm_read(maa_pwm_context dev)
mraa_pwm_read(mraa_pwm_context dev)
{
float output = maa_pwm_get_duty(dev) / (float) maa_pwm_get_period(dev);
float output = mraa_pwm_get_duty(dev) / (float) mraa_pwm_get_period(dev);
return output;
}
maa_result_t
maa_pwm_period(maa_pwm_context dev, float seconds)
mraa_result_t
mraa_pwm_period(mraa_pwm_context dev, float seconds)
{
return maa_pwm_period_ms(dev, seconds*1000);
return mraa_pwm_period_ms(dev, seconds*1000);
}
maa_result_t
maa_pwm_period_ms(maa_pwm_context dev, int ms)
mraa_result_t
mraa_pwm_period_ms(mraa_pwm_context dev, int ms)
{
return maa_pwm_period_us(dev, ms*1000);
return mraa_pwm_period_us(dev, ms*1000);
}
maa_result_t
maa_pwm_period_us(maa_pwm_context dev, int us)
mraa_result_t
mraa_pwm_period_us(mraa_pwm_context dev, int us)
{
return maa_pwm_write_period(dev, us*1000);
return mraa_pwm_write_period(dev, us*1000);
}
maa_result_t
maa_pwm_pulsewidth(maa_pwm_context dev, float seconds)
mraa_result_t
mraa_pwm_pulsewidth(mraa_pwm_context dev, float seconds)
{
return maa_pwm_pulsewidth_ms(dev, seconds*1000);
return mraa_pwm_pulsewidth_ms(dev, seconds*1000);
}
maa_result_t
maa_pwm_pulsewidth_ms(maa_pwm_context dev, int ms)
mraa_result_t
mraa_pwm_pulsewidth_ms(mraa_pwm_context dev, int ms)
{
return maa_pwm_pulsewidth_us(dev, ms*1000);
return mraa_pwm_pulsewidth_us(dev, ms*1000);
}
maa_result_t
maa_pwm_pulsewidth_us(maa_pwm_context dev, int us)
mraa_result_t
mraa_pwm_pulsewidth_us(mraa_pwm_context dev, int us)
{
return maa_pwm_write_duty(dev, us*1000);
return mraa_pwm_write_duty(dev, us*1000);
}
maa_result_t
maa_pwm_enable(maa_pwm_context dev, int enable)
mraa_result_t
mraa_pwm_enable(mraa_pwm_context dev, int enable)
{
int status;
if (enable != 0) {
@@ -247,21 +247,21 @@ maa_pwm_enable(maa_pwm_context dev, int enable)
if (enable_f == -1) {
fprintf(stderr, "Failed to open enable for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[2];
int size = snprintf(out, sizeof(out), "%d", enable);
if (write(enable_f, out, size * sizeof(char)) == -1) {
fprintf(stderr, "Failed to write to enable!\n");
close(enable_f);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(enable_f);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_pwm_unexport_force(maa_pwm_context dev)
mraa_result_t
mraa_pwm_unexport_force(mraa_pwm_context dev)
{
char filepath[MAX_SIZE];
snprintf(filepath, MAX_SIZE, "/sys/class/pwm/pwmchip%d/unexport", dev->chipid);
@@ -269,7 +269,7 @@ maa_pwm_unexport_force(maa_pwm_context dev)
int unexport_f = open(filepath, O_WRONLY);
if (unexport_f == -1) {
fprintf(stderr, "Failed to open unexport for writing!\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
char out[MAX_SIZE];
@@ -277,36 +277,36 @@ maa_pwm_unexport_force(maa_pwm_context dev)
if (write(unexport_f, out, size*sizeof(char)) == -1) {
fprintf(stderr, "Failed to write to unexport!\n");
close(unexport_f);
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
close(unexport_f);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_pwm_unexport(maa_pwm_context dev)
mraa_result_t
mraa_pwm_unexport(mraa_pwm_context dev)
{
maa_pwm_enable(dev, 0);
mraa_pwm_enable(dev, 0);
if (dev->owner) {
return maa_pwm_unexport_force(dev);
return mraa_pwm_unexport_force(dev);
}
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
maa_result_t
maa_pwm_close(maa_pwm_context dev)
mraa_result_t
mraa_pwm_close(mraa_pwm_context dev)
{
maa_pwm_unexport(dev);
mraa_pwm_unexport(dev);
free(dev);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_pwm_owner(maa_pwm_context dev, maa_boolean_t owner_new)
mraa_result_t
mraa_pwm_owner(mraa_pwm_context dev, mraa_boolean_t owner_new)
{
if (dev == NULL)
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
dev->owner = owner_new;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}

18
src/python/CMakeLists.txt
View File

@@ -6,21 +6,21 @@ include_directories(
${PYTHON_INCLUDE_DIRS}
)
set_source_files_properties (pymaa.i PROPERTIES CPLUSPLUS ON)
set_source_files_properties (pymaa.i PROPERTIES SWIG_FLAGS "-I${CMAKE_BINARY_DIR}/src")
swig_add_module (pymaa python pymaa.i ${maa_LIB_SRCS})
swig_link_libraries (pymaa ${PYTHON_LIBRARIES})
set_source_files_properties (pymraa.i PROPERTIES CPLUSPLUS ON)
set_source_files_properties (pymraa.i PROPERTIES SWIG_FLAGS "-I${CMAKE_BINARY_DIR}/src")
swig_add_module (pymraa python pymraa.i ${mraa_LIB_SRCS})
swig_link_libraries (pymraa ${PYTHON_LIBRARIES})
set (CMAKE_C_FLAGS -DSWIGPYTHON=${SWIG_FOUND})
if (DOXYGEN_FOUND)
foreach (_file ${DOCCLASSES})
add_dependencies (${SWIG_MODULE_pymaa_REAL_NAME} ${_file}class_doc_i)
add_dependencies (${SWIG_MODULE_pymraa_REAL_NAME} ${_file}class_doc_i)
endforeach ()
add_dependencies (${SWIG_MODULE_pymaa_REAL_NAME} commondoc_i)
add_dependencies (${SWIG_MODULE_pymraa_REAL_NAME} commondoc_i)
add_custom_target (pydoc
pydoc -w ${CMAKE_CURRENT_BINARY_DIR}/pymaa.py ${CMAKE_CURRENT_BINARY_DIR}/
pydoc -w ${CMAKE_CURRENT_BINARY_DIR}/pymraa.py ${CMAKE_CURRENT_BINARY_DIR}/
WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
COMMENT "Generating API documentation with pydoc" VERBATIM
)
@@ -31,8 +31,8 @@ string (REPLACE "." ";" PYTHON_VERSION_LIST ${PYTHONLIBS_VERSION_STRING})
list (GET PYTHON_VERSION_LIST 0 PYTHON_VERSION_MAJOR)
list (GET PYTHON_VERSION_LIST 1 PYTHON_VERSION_MINOR)
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/_pymaa.so
${CMAKE_CURRENT_BINARY_DIR}/pymaa.py
install (FILES ${CMAKE_CURRENT_BINARY_DIR}/_pymraa.so
${CMAKE_CURRENT_BINARY_DIR}/pymraa.py
DESTINATION lib/python${PYTHON_VERSION_MAJOR}.${PYTHON_VERSION_MINOR}/site-packages/)
add_subdirectory (docs)

2
src/python/docs/CMakeLists.txt
View File

@@ -36,6 +36,6 @@ if (DOXYGEN_FOUND)
COMMENT "Building HTML documentation with Sphinx"
)
add_dependencies (sphinx ${SWIG_MODULE_pymaa_REAL_NAME})
add_dependencies (sphinx ${SWIG_MODULE_pymraa_REAL_NAME})
endif ()
endif ()

6
src/python/docs/conf.py.in
View File

@@ -47,7 +47,7 @@ source_suffix = '.rst'
master_doc = 'index'
# General information about the project.
project = 'pymaa'
project = 'pymraa'
copyright = '2014, Intel Corporation'
# The version info for the project you're documenting, acts as replacement for
@@ -55,7 +55,7 @@ copyright = '2014, Intel Corporation'
# built documents.
#
# The short X.Y version.
version = '@maa_VERSION_STRING@'
version = '@mraa_VERSION_STRING@'
# The full version, including alpha/beta/rc tags.
release = '@VERSION@'
@@ -180,7 +180,7 @@ html_static_path = ['_static']
#html_file_suffix = None
# Output file base name for HTML help builder.
htmlhelp_basename = 'pymaadoc'
htmlhelp_basename = 'pymraadoc'
# -- Options for LaTeX output ---------------------------------------------

12
src/python/docs/example.rst
View File

@@ -1,16 +1,16 @@
#######
Example
#######
Here are some examples of how to use pymaa, common convention is to import pymaa as maa to keep it short but feel free to import it globally!
Here are some examples of how to use pymraa, common convention is to import pymraa as mraa to keep it short but feel free to import it globally!
Hello GPIO
==========
Here is the simplest Gpio program in pymaa.
Here is the simplest Gpio program in pymraa.
.. literalinclude:: ../../../examples/python/hello_gpio.py
:prepend: import pymaa
:start-after: import pymaa
:prepend: import pymraa
:start-after: import pymraa
GPIO Interupt (isr)
===================
@@ -20,6 +20,6 @@ The GPIO module allows you to set an interupt on a GPIO. This interupt is contro
**Note:** Galileo Gen1 only supports EDGE_BOTH
.. literalinclude:: ../../../examples/python/hello_isr.py
:prepend: import pymaa as maa
:start-after: import pymaa as maa
:prepend: import pymraa as mraa
:start-after: import pymraa as mraa

4
src/python/docs/index.rst
View File

@@ -3,7 +3,7 @@
You can adapt this file completely to your liking, but it should at least
contain the root `toctree` directive.
Welcome to Pymaa's documentation!
Welcome to Pymraa's documentation!
=============================
Contents:
@@ -11,7 +11,7 @@ Contents:
.. toctree::
:maxdepth: 2
pymaa
pymraa
example

4
src/python/docs/pymaa.rst → src/python/docs/pymraa.rst
View File

@@ -1,7 +1,7 @@
pymaa module
pymraa module
============
.. automodule:: pymaa
.. automodule:: pymraa
:members:
:undoc-members:
:show-inheritance:

6
src/python/pymaa.i
View File

@@ -1,6 +0,0 @@
%module(docstring="Python interface to libmaa") pymaa
%feature("autodoc", "3");
%include ../maa.i

6
src/python/pymraa.i Normal file
View File

@@ -0,0 +1,6 @@
%module(docstring="Python interface to libmraa") pymraa
%feature("autodoc", "3");
%include ../mraa.i

48
src/spi/spi.c
View File

@@ -31,7 +31,7 @@
#include <unistd.h>
#include "spi.h"
#include "maa_internal.h"
#include "mraa_internal.h"
#define MAX_SIZE 64
#define SPI_MAX_LENGTH 4096
@@ -44,20 +44,20 @@ struct _spi {
int devfd; /**< File descriptor to SPI Device */
int mode; /**< Spi mode see spidev.h */
int clock; /**< clock to run transactions at */
maa_boolean_t lsb; /**< least significant bit mode */
mraa_boolean_t lsb; /**< least significant bit mode */
unsigned int bpw; /**< Bits per word */
/*@}*/
};
maa_spi_context
maa_spi_init(int bus)
mraa_spi_context
mraa_spi_init(int bus)
{
maa_spi_bus_t *spi = maa_setup_spi(bus);
mraa_spi_bus_t *spi = mraa_setup_spi(bus);
if(bus < 0) {
fprintf(stderr, "Failed. SPI platform Error\n");
return NULL;
}
maa_spi_context dev = (maa_spi_context) malloc(sizeof(struct _spi));
mraa_spi_context dev = (mraa_spi_context) malloc(sizeof(struct _spi));
memset(dev, 0, sizeof(struct _spi));
char path[MAX_SIZE];
@@ -77,22 +77,22 @@ maa_spi_init(int bus)
return dev;
}
maa_result_t
maa_spi_mode(maa_spi_context dev, unsigned short mode)
mraa_result_t
mraa_spi_mode(mraa_spi_context dev, unsigned short mode)
{
dev->mode = mode;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_spi_frequency(maa_spi_context dev, int hz)
mraa_result_t
mraa_spi_frequency(mraa_spi_context dev, int hz)
{
dev->clock = hz;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_spi_lsbmode(maa_spi_context dev, maa_boolean_t lsb)
mraa_result_t
mraa_spi_lsbmode(mraa_spi_context dev, mraa_boolean_t lsb)
{
uint8_t lsb_mode = 0;
if (lsb == 1) {
@@ -100,21 +100,21 @@ maa_spi_lsbmode(maa_spi_context dev, maa_boolean_t lsb)
}
if (ioctl (dev->devfd, SPI_IOC_WR_LSB_FIRST, &lsb_mode) < 0) {
fprintf(stderr, "Failed to set bit order\n");
return MAA_ERROR_INVALID_RESOURCE;
return MRAA_ERROR_INVALID_RESOURCE;
}
dev->lsb = lsb;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
maa_result_t
maa_spi_bit_per_word(maa_spi_context dev, unsigned int bits)
mraa_result_t
mraa_spi_bit_per_word(mraa_spi_context dev, unsigned int bits)
{
dev->bpw = bits;
return MAA_SUCCESS;
return MRAA_SUCCESS;
}
uint8_t
maa_spi_write(maa_spi_context dev, uint8_t data)
mraa_spi_write(mraa_spi_context dev, uint8_t data)
{
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -136,7 +136,7 @@ maa_spi_write(maa_spi_context dev, uint8_t data)
}
uint8_t*
maa_spi_write_buf(maa_spi_context dev, uint8_t* data, int length)
mraa_spi_write_buf(mraa_spi_context dev, uint8_t* data, int length)
{
struct spi_ioc_transfer msg;
memset(&msg, 0, sizeof(msg));
@@ -156,9 +156,9 @@ maa_spi_write_buf(maa_spi_context dev, uint8_t* data, int length)
return recv;
}
maa_result_t
maa_spi_stop(maa_spi_context dev)
mraa_result_t
mraa_spi_stop(mraa_spi_context dev)
{
close(dev->devfd);
return MAA_SUCCESS;
return MRAA_SUCCESS;
}