docs: explain aio numbering scheme

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>

docs/edison.md

@@ -22,6 +22,8 @@ in libmraa:
 - SPI exposed is also used for the ADC. Try not to use your own CS.
 - ADC kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits. This ADC is only included on the arduino board.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio
 
 Intel breakout board
 --------------------

docs/galileorevd.md

@@ -9,3 +9,5 @@ The rev D board has the following limitations in libmraa:
 - gpio register access via /dev/uio is limited to pin2 and 3
 - gpio interupts will only work on GPIO_EDGE_BOTH
 - adc kernel module will return 12bit number. MRAA defaults shift this to 10bits
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio

docs/galileorevh.md

@@ -15,3 +15,5 @@ The Gen 2 board has the following limitations in libmraa:
   all pwm channels
 - adc kernel module will return 12bit number but the ADC itself only has an
   accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio