docs: explain aio numbering scheme

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
2014-11-21 11:58:08 +00:00
parent 8f9059767f
commit 97e00d9298
3 changed files with 6 additions and 0 deletions
--- a/docs/galileorevh.md
+++ b/docs/galileorevh.md
@@ -15,3 +15,5 @@ The Gen 2 board has the following limitations in libmraa:
  all pwm channels
 - adc kernel module will return 12bit number but the ADC itself only has an
  accuracy of 10bits.
+- AIO pins are treated as 0-5 in mraa_aio_init() but as 14-19 for everything
+  else. Therefore use mraa_gpio_init(14) to use A0 as a Gpio