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platform: add Radxa CM5 IO platform support

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Signed-off-by: Nascs <nascs@radxa.com>
This commit is contained in:
nascs
2023-10-11 10:32:50 +00:00
committed by Tom Ingleby
parent 651131b475
commit d055b45b7e
10 changed files with 317 additions and 1 deletions
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33
api/mraa/types.h
View File

@@ -76,6 +76,7 @@ typedef enum {
MRAA_ORANGE_PI_PRIME = 31, /**< Orange Pi Prime board */
MRAA_RADXA_ROCK_3B = 32, /**< Radxa ROCK 3 Model B */
MRAA_RADXA_CM3 = 33, /**< Radxa CM3 */
MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
// USB platform extenders start at 256
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -251,6 +252,37 @@ typedef enum {
MRAA_RADXA_ROCK_5B_PIN40 = 40
} mraa_radxa_rock_5b_wiring_t;
/**
* Radxa CM5 IO GPIO numbering enum
*/
typedef enum {
RADXA_CM5_IO_PIN3 = 3,
RADXA_CM5_IO_PIN5 = 5,
RADXA_CM5_IO_PIN7 = 7,
RADXA_CM5_IO_PIN8 = 8,
RADXA_CM5_IO_PIN10 = 10,
RADXA_CM5_IO_PIN11 = 11,
RADXA_CM5_IO_PIN12 = 12,
RADXA_CM5_IO_PIN13 = 13,
RADXA_CM5_IO_PIN15 = 15,
RADXA_CM5_IO_PIN16 = 16,
RADXA_CM5_IO_PIN18 = 18,
RADXA_CM5_IO_PIN19 = 19,
RADXA_CM5_IO_PIN21 = 21,
RADXA_CM5_IO_PIN22 = 22,
RADXA_CM5_IO_PIN23 = 23,
RADXA_CM5_IO_PIN24 = 24,
RADXA_CM5_IO_PIN26 = 26,
RADXA_CM5_IO_PIN29 = 29,
RADXA_CM5_IO_PIN31 = 31,
RADXA_CM5_IO_PIN32 = 32,
RADXA_CM5_IO_PIN33 = 33,
RADXA_CM5_IO_PIN35 = 35,
RADXA_CM5_IO_PIN36 = 36,
RADXA_CM5_IO_PIN38 = 38,
RADXA_CM5_IO_PIN40 = 40
} mraa_radxa_cm5_io_wiring_t;
/**
* Radxa ROCK 3 Model B GPIO numbering enum
*/
@@ -283,7 +315,6 @@ typedef enum {
RADXA_ROCK_3B_PIN40 = 40
} mraa_radxa_rock_3b_wiring_t;
/**
* Radxa ROCK 3 Model C GPIO numbering enum
*/

32
api/mraa/types.hpp
View File

@@ -70,6 +70,7 @@ typedef enum {
ORANGE_PI_PRIME = 31, /**< Orange Pi Prime board */
RADXA_ROCK_3B = 32, /**< Radxa ROCK 3 Model B */
RADXA_CM3 = 33, /**< Radxa CM3 */
RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -242,6 +243,37 @@ typedef enum {
RADXA_ROCK_5B_PIN40 = 40
} RadxaRock5BWiring;
/**
* Radxa CM5 IO GPIO numbering enum
*/
typedef enum {
RADXA_CM5_IO_PIN3 = 3,
RADXA_CM5_IO_PIN5 = 5,
RADXA_CM5_IO_PIN7 = 7,
RADXA_CM5_IO_PIN8 = 8,
RADXA_CM5_IO_PIN10 = 10,
RADXA_CM5_IO_PIN11 = 11,
RADXA_CM5_IO_PIN12 = 12,
RADXA_CM5_IO_PIN13 = 13,
RADXA_CM5_IO_PIN15 = 15,
RADXA_CM5_IO_PIN16 = 16,
RADXA_CM5_IO_PIN18 = 18,
RADXA_CM5_IO_PIN19 = 19,
RADXA_CM5_IO_PIN21 = 21,
RADXA_CM5_IO_PIN22 = 22,
RADXA_CM5_IO_PIN23 = 23,
RADXA_CM5_IO_PIN24 = 24,
RADXA_CM5_IO_PIN26 = 26,
RADXA_CM5_IO_PIN29 = 29,
RADXA_CM5_IO_PIN31 = 31,
RADXA_CM5_IO_PIN32 = 32,
RADXA_CM5_IO_PIN33 = 33,
RADXA_CM5_IO_PIN35 = 35,
RADXA_CM5_IO_PIN36 = 36,
RADXA_CM5_IO_PIN38 = 38,
RADXA_CM5_IO_PIN40 = 40
} RadxaCM5IOWiring;
/**
* Radxa ROCK 3 Model B GPIO numbering enum
*/