6770be911b
Signed-off-by: Serge Vakulenko <vak@besm6.org> Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
68 lines
2.0 KiB
Markdown
68 lines
2.0 KiB
Markdown
Onion Omega2 {#omega2}
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============
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The Omega2 board is based on the MediaTek MT7688 system on a chip, which
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includes a MIPS 24KEc 580 MHz processor and 128 megabytes of RAM.
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Features:
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* 15 GPIO pins
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* 2 PWM pins
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* 2 UART ports
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* 1 SPI master port
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* 1 I2C port
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* 1 I2S port (not supported by libmraa)
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Revision Support
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----------------
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* Omega2
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* Omega2+
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Pin Mapping
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-----------
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Left side:
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| MRAA Number | Function |
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|-------------|------------------------|
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| --- | GND |
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| 1 | GPIO11 |
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| 2 | GPIO3, (I2S CLK) |
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| 3 | GPIO2, (I2S WS) |
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| 4 | GPIO17 |
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| 5 | GPIO16 |
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| 6 | GPIO15 |
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| 7 | GPIO46, UART RX1 |
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| 8 | GPIO45, UART TX1 |
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| 9 | SPI MISO |
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| 10 | SPI MOSI |
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| 11 | SPI SCK |
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| 12 | GPIO6, SPI CS |
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| 13 | GPIO1, (I2S SDO) |
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| 14 | GPIO0, (I2S SDI) |
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| --- | (Reset) |
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Right side:
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| MRAA Number | Function |
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|-------------|------------------------|
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| --- | GND |
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| --- | VIN 3V3 |
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| --- | (USB D+) |
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| --- | (USB D-) |
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| 20 | GPIO13, UART RX0 |
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| 21 | GPIO12, UART TX0 |
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| 22 | FW RST |
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| --- | VOUT 3V3 |
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| --- | (Eth TX-) |
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| --- | (Eth TX+) |
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| --- | (Eth RX-) |
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| --- | (Eth RX+) |
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| 28 | GPIO18, PWM0 |
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| 29 | GPIO19, PWM1 |
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| 30 | GPIO4, I2C SCL |
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| 31 | GPIO5, I2C SDA |
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