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intel_gt_tuchuck.c: Clear uart pin cap since bios doesn't allow muxing

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Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit is contained in:
Brendan Le Foll
2016-11-30 11:37:47 +01:00
parent 1c180e393c
commit c1017bb6ea
1 changed files with 10 additions and 10 deletions
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20
src/x86/intel_gt_tuchuck.c
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@@ -189,7 +189,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART0TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
// not configured as GPIO
//b->pins[pos].gpio.pinmap = 462;
//b->pins[pos].gpio.mux_total = 0;
@@ -297,7 +297,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 472;
//b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -313,7 +313,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 0, 0, 0, 0, 0, 0, 0 };
//b->pins[pos].gpio.pinmap = 471;
//b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -554,7 +554,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART0RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 467;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -569,7 +569,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART0RT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 469;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -586,7 +586,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART0CT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 412;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -603,7 +603,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1TX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 484;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -620,7 +620,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1RX", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 483;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -637,7 +637,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1RT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 485;
b->pins[pos].gpio.mux_total = 0;
b->pins[pos].uart.pinmap = 0;
@@ -652,7 +652,7 @@ mraa_gt_tuchuck_board()
pos++;
strncpy(b->pins[pos].name, "UART1CT", 8);
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 1 };
b->pins[pos].capabilities = (mraa_pincapabilities_t){ 1, 1, 0, 0, 0, 0, 0, 0 };
b->pins[pos].gpio.pinmap = 486;
b->pins[pos].uart.pinmap = 0;
b->pins[pos].uart.parent_id = 0;