- FT4222 GPIO ISR implementation was specific to C/C++ and ignored
language binding support. This is now fixed via adv_func updates.
- GPIO ISR code has been refactored to reduce i2c traffic when using
I/O expanders
- Added support for built-in FT4222 GPIO interrupts
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
The pinout for the Low Speed Expansion on the MinnowBoard
Turbot is the same as the MinnowBoard MAX A2 desgin, with
the exception of pin 26. Pin 26 was changed to provide an MCLK
reference clock for I2S.
In addition, the D2 LED is now under GPIO control.
Add support for these changes.
Signed-off-by: Constantin Musca <constantin.musca@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
mraa_adv_func_t->gpio_init_internal_replace() now has mraa_gpio_context
parameter so that override function can access both physical and logical
pin numbers.
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
- C API read/write integer functions changed to int to match C types
- C API now has close function to release resources acquired during init
- iio internal type isr_event() function now has args param in signature
- C++ API now supports events with handler interface and new data structure
- C and C++ examples updated to use API changes
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This means that a valid platform is no longer required for iio operations and
therefore this is now only a req for using USBPLAT
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Code crept in from ft4222 branch merge and is superflous becuase of the new
advance function structure
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This commit creates a new structure inside each _iio device when used and can
then be used to understand the data being read after a trigger is run/executed
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This patch adds support to 96boards. 96boards is an open platform
specification. This spec strandardizes the pins on the external
connectors like Low speed and High speed. Given these pins are standard
across multiple boards, I think adding a generic 96boards made sense to
me.
The idea behind adding this generic board file is to make mraa work on
most of the 96boards with minimal changes to board support in libmraa.
This patch adds support to the LS expansion connector which has got 12
gpio pins + 2 i2c + 1 spi and 2 uarts.
For now I have added Dragaon board DB401c support as part of this patch
and is tested.
More info about board @ https://www.96boards.org/products/ce/dragonboard410c/
Long term plan is to get all this configuration from the /sys and
populate the board specifics dynamically, which is bit easy with
96boards specs in-place.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This is an attempt to make the mraa work on wide boards with minimal
board setup.
Most of the arm boards with latest kernel have pinmux already setup by
the driver and its really not necessary for mraa to check each pin and
icheck if the pinmux is required or not. Having this flag would cut lot
of code in board support and its possible to add some generic board
support which can make use of mraa easily.
Without this patch each board support has to have pins setup in there
bus structure.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Add makefile for building libmraa library.
Import glob functionality from the NetBSD project where the glob.c and
glob.h files are released under BSD 3-clause License. Minor changes were
applied in order to make them compile for Android and Brillo.
This patch adds a control pipe used to interrupt the poll() function
as an alternative to pthread cancellation API.
Change-Id: Id719da4c839acbd320b0cc0e0113c2a5239c8029
Signed-off-by: Mihai Serban <mihai.serban@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Also modified ISR handler logic to account for the flag.
This fixes isrExit() deadlock in Python interactive mode
and prevents a more generic problem of a spurious ISR call
after mraa_gpio_isr_exit() is run.
Closes#268.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
mraa_i2c_init_internal() implenents logic of mraa_i2c_init_raw()
allowing mraa_adv_func_t to be passed in as a parameter
instead of of being global.
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Now platform_type is no longer global it tracks with board instance
so that platform and sub-platform can report different types.
Signed-off-by: Henry Bruce <henry.bruce@intel.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
This could be generally useful and more specifically is a
prerequisite for issue #178.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
The declaration seems to be misplaced compared to all other similar structs.
It's also a prerequisite for introducing the _replace hook for spi_lsbmode(),
per issue #178.
Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
src/arm/CMakeLists.txt added beaglebone.c as a dependency src/arm/arm.c added
initialization of beaglebone black platform src/arm/beaglebone.c mraa support
for the Beaglebone Black Rev B+C includes support for mmap access to gpio
Signed-off-by: Michael Ring <mail@michael-ring.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
current code in pwm does not work for beaglebone src/pwm/pwm.c Implemented
check for pwm_init_replace
Signed-off-by: Michael Ring <mail@michael-ring.org>
Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
Used for getting the path to the character device under linux for uart
device. i.e. "/dev/ttyS0"
Adds paths to existing platforms.
Closes#84
Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
