Alex Tereschenko 32196d10e9 joule: align SPI bus numbering with reality ...

Also update docs to make the numbering and pins used crystal clear.

Closes #758.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>

2017-06-15 20:49:18 +02:00

..

CMakeLists.txt

npm: Fix npm builds for ARM hosts

2015-07-24 14:04:48 +01:00

intel_cherryhills.c

mraa: Correct spelling of capabilities

2016-08-08 21:44:00 +02:00

intel_de3815.c

mraa: Correct spelling of capabilities

2016-08-08 21:44:00 +02:00

intel_edison_fab_c.c

intel_edison_fab_c.c: fix unused variables

2017-05-29 18:47:45 +02:00

intel_galileo_rev_d.c

mraa: Correct spelling of capabilities

2016-08-08 21:44:00 +02:00

intel_galileo_rev_g.c

intel_galileo_rev_g.c: use pincmd to set OUT_HIGH instead of value

2016-09-02 12:00:29 +01:00

intel_joule_expansion.c

joule: align SPI bus numbering with reality

2017-06-15 20:49:18 +02:00

intel_minnow_byt_compatible.c

x86: Normalized function names in up & byt platform

2017-02-06 21:32:54 +00:00

intel_nuc5.c

mraa: Correct spelling of capabilities

2016-08-08 21:44:00 +02:00

intel_sofia_3gr.c

mraa: Correct spelling of capabilities

2016-08-08 21:44:00 +02:00

up.c

up.c: Fixed pin name size on up board

2017-05-12 01:23:47 -07:00

x86.c

Revert "x86.c: add NUC5i7RYB to the list of known NUC5 platforms"

2017-05-12 01:23:58 -07:00