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1173 Commits

Author SHA1 Message Date
nascs
09cea58214 platform: add Radxa ROCK 3C platform support
Signed-off-by: Nascs <nascs@radxa.com>
2023-09-11 13:04:51 -07:00
nascs
fcf8b600eb rockpi4: fixed the issuse 'spi not work'
Signed-off-by: nascs <nascs@radxa.com>
2023-06-07 06:07:36 -07:00
nascs
749f958297 rockpi4: fixed the issuse 'No Pins'
Signed-off-by: nascs <nascs@radxa.com>
2023-06-07 06:07:36 -07:00
Jan Kiszka
8b1c54934e iot2050: Add USER button
A simple GPIO, no muxing needed, no pulling supported. Therefore, reject
any mode changes that request pull up/down, ignore the others.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-08-05 12:04:23 -07:00
Ivan Mikhaylov
a9f0ff22e8 platform: add iot2050 platform support
This patch introuduce iot2050 platform support, it is the port from
meta-iot2050 layer.

Based on original patch by Le Jin.

Signed-off-by: Le Jin <le.jin@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
2022-08-05 12:04:23 -07:00
Jan Kiszka
0c44a7291b gpio: chardev: Add function to retrieve sysfs base for a gpiochip
This allows to full mux structures which still need the sysfs GPIO
numbers. In combination with mraa_find_gpio_line_by_name, this allows
for platform setup that is independent of the gpiochip probing order.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-08-05 12:04:23 -07:00
Jan Kiszka
56a11363de gpio: chardev: Add helper to retrieve gpiochip and line offset by line name
This makes the retrieval robust against chips being reordered during
boot. The results can be used to fill out mraa_pin_t while initializing
a board.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-08-05 12:04:23 -07:00
Ivan Mikhaylov
fdab66958e uart: add 4800 baud speed
Signed-off-by: Le Jin <le.jin@siemens.com>
Signed-off-by: Ivan Mikhaylov <fr0st61te@gmail.com>
2022-08-05 12:04:23 -07:00
Ivan Mikhaylov
4450073721 uart: disable timeout on read <= 0
Signed-off-by: Le Jin <le.jin@siemens.com>
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
2022-08-05 12:04:23 -07:00
Ivan Mikhaylov
307a6f3bdd mux: add mux interface
Add mux_init_reg interface with different mux modes for GPIO, UART, SPI,
I2C, PWM, AIO.

Signed-off-by: Le Jin <le.jin@siemens.com>
Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
2022-08-05 12:04:23 -07:00
Hirokazu MORIKAWA
046bdd0adb Support for swig 4.1.0
In swig 4.1.0, the complicated handling of "SWIG_V8_VERSION" has been cleaned up a bit. I made the same changes as in this swig.

Signed-off-by: Hirokazu MORIKAWA <morikw2@gmail.com>
2022-07-01 07:40:41 -07:00
Aaron Shaw
3b22201791 feat: add newer raspberry pi 4b variants
add newer pi 4 variants a03112, a03115, b03114, b03115, c03114, c03115, d03115

Signed-off-by: Aaron Shaw <shawaj@gmail.com>
2022-07-01 07:38:51 -07:00
Ivan Mikhaylov
9ea6cd2dc6 gpio: fix incorrect assignment of *cinfos in mraa_get_chip_infos
*cinfos in mraa_get_chip_infos is not set in case of
mraa_get_chip_info_by_name failure which happens on access of /dev/gpiochip*
files which leads to memory free by invalid pointer in *cinfos.

As example, it can be easy recreated with non-root run of mraa-gpio:

test@iot2050-debian:~$ mraa-gpio
free(): invalid pointer
Aborted

Signed-off-by: Ivan Mikhaylov <ivan.mikhaylov@siemens.com>
2022-07-01 07:37:59 -07:00
Jan Kiszka
8185e983e1 gpio: Silence own use of deprecated mraa_gpio_use_mmaped
The warning is aiming at external use, not our own one. Silence the
latter by adding an internal service that the deprecated function calls
and use that service in the remaining mraa use cases.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-07-01 07:37:42 -07:00
Jan Kiszka
96472d1065 python3: Drop bogus CMAKE_C_FLAGS
CMake automatically pulls CMAKE_C_FLAGS and CMAKE_CXX_FLAGS, according
to the source file. Adding CMAKE_C_FLAGS unconditionally only raises

cc1plus: warning: ‘-Werror=’ argument ‘-Werror=implicit’ is not valid for C++
cc1plus: warning: ‘-Werror=’ argument ‘-Werror=missing-parameter-type’ is not valid for C++

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-07-01 07:37:42 -07:00
Jan Kiszka
73afc7a7e2 iio: Silence format-truncation warnings
Truncation warnings are default-on with many gcc-10 packages but the
module is fine with the potential truncations of sysfs paths as they
are.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-07-01 07:37:42 -07:00
Jan Kiszka
a54d4499ec iio: Add missing parameter in error log output
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2022-07-01 07:37:42 -07:00
James Jones
87c6754f00 rockpi4.c: Add chardev GPIO support
The recommended config for upstream kernels (arm64
defconfig) on the Radxa "mainline" kernel Wiki
does not include GPIO sysfs support, so libmraa
applications and utilies don't work out of the
box. This change marks the board as supporting the
GPIO character device interface and fixes the
group and line number assignments such that it
actually works. Performance is also noticeably
better with the chardev path.

I tested this by using mraa-gpio to toggle various
pins on the 40-pin header with a multimeter
attached, and with a program I have that that
toggles 8 GPIO pins at the same time to upload
data to another system using a parallel protocol.
On upstream/mainline kernels, chardev support is
now used. On the older 4.4 kernels from Radxa,
chardev support is not available and libmraa
gracefully falls back to sysfs.

Note another significant difference compared to
the Radxa kernels in upstream kernels is the
default devicetree must be tweaked to disable the
'i2s1' device in order to use GPIO pins 12, 35,
36, 38, and 40 via libmraa. For example, I
appended the following section:

  &i2s1 {
      status = "disabled";
  };

to arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts
to accomplish this.

Signed-off-by: James Jones <linux@theinnocuous.com>
2022-05-25 08:14:41 -07:00
Jan Kiszka
d7ae17171b aio: Update shifter_value and max_analog_value on mraa_aio_set_bit
mraa_aio_set_bit() changes value_bit, so the calculations of
shifter_value and max_analog_value become outdated. Move their
initialization to mraa_aio_set_bit and call that function from
mraa_aio_init instead.

Based on original patch by Le Jin.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-08-23 09:14:26 -07:00
Jan Kiszka
e446cf0110 gpio: Avoid spurious value reset without output mode changes
When a GPIO controlled via sysfs is set again to output mode, the kernel
also sets the value to 0. This can cause spurious output or mux changes,
e.g. when calling "mraa-gpio set <n> 1" for a pin that was already set.

Avoid this by checking the current direction, only writing it when
actually needed.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-06-30 12:57:27 -07:00
Jan Kiszka
954b17ded4 led: Fix and cleanup initialization
The structure returned by readdir is may be statically allocated.
Keeping a pointer to it is broken.

The LED path is generally not a directory, it's a link to a directory.
And even if it were a directory, that would tell nothing about the
caller's access permissions.

And then there is a lot of duplication between mraa_led_init and
mraa_led_init_raw.

This addresses that all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-06-29 11:49:25 -07:00
Jan Kiszka
11e65ee9bf uart: Convert rtscts and xonxoff in mraa_uart_settings into mraa_boolean_t
This aligns the getter with the setter (mraa_uart_set_flowcontrol).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-06-29 11:48:16 -07:00
Jan Kiszka
aeb0b331b5 uart: Fix software flow control management
Rather than updating IXON/IXOFF in termios, mraa_uart_set_flowcontrol
was incorrectly issuing a stop or start character on mode changes. This
lead to spurious transmission in setups that actually wanted to disable
software flow control. And it prevented enabling it (which could have
been checked also by reading back the state via mraa_uart_settings).

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-06-29 11:48:16 -07:00
Arora, Jeet
31c4a8d0db Added Intel Learning kit to platforms.
Signed-off-by: Arora, Jeet <jeet.arora@intel.com>
Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2021-04-07 12:41:08 -07:00
Chuckduey
bb1c6df16b Added Raspberry Pi 400 to platforms
Signed-off-by: Chuckduey <cduey@msn.com>
2021-02-01 13:35:09 -08:00
Mihai Tudor Panu
1a66c6dc6a python2: remove ability to build python2 bindings from project
This removes Python 2 package generation from the project to encourage safer development with Python 3 instead. Documentation for the generated modules switched to Python 3. Default interpreter is now Python 3 but can be overridden if needed for running the tests only on older environments.

Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
2020-10-28 09:41:43 -07:00
gowtham.r
aa7c41983f fixing size missmatch between snprintf and actual size.
Signed-off-by: gowtham.r <gowtham.r@adlinktech.com>
2020-09-21 20:05:54 -07:00
Chuckduey
f24fcf5a6e Added Pi 4 8GB to Pi 4 section
Signed-off-by: Chuckduey <cduey@msn.com>
2020-09-15 10:40:12 -07:00
Fabrice Fontaine
cb88e4dd1f CMakeLists.txt: add BUILDCPP option
C++ is a mandatory dependency since version 1.4.0 and
122cab1f1e

As a result, build on embedded toolchains that do not support C++ fails
on:

CMake Error at CMakeLists.txt:2 (project):
  The CMAKE_CXX_COMPILER:

    /home/naourr/work/instance-1/output-1/per-package/mraa/host/bin/arm-linux-g++

  is not a full path to an existing compiler tool.

Fixes:
 - http://autobuild.buildroot.org/results/31086422e03611c16ab59c4418e3669b580bc0c0

Signed-off-by: Fabrice Fontaine <fontaine.fabrice@gmail.com>
2020-09-15 10:39:42 -07:00
Jandrioli
d74b0d8a73 Fix code to set SPI frequency/clock
Signed-off-by: Jandrioli <joao_andrioli@hotmail.com>
2020-09-15 10:38:37 -07:00
akgnah
710106d99f rockpi4: add model c support
Signed-off-by: akgnah <1024@setq.me>
2020-09-15 10:38:03 -07:00
Jefferson Lee
da36b7ae84 Added the mraa_strresult function
Signed-off-by: Jefferson Lee <jeffersonlee2000@gmail.com>
2020-09-15 10:37:05 -07:00
gowtham.r
68e75edcad Adding alias name LEC-ALAI for LEC-AL-AI platform.
Signed-off-by: gowtham.r <gowtham.r@adlinktech.com>
2020-09-15 10:36:11 -07:00
gowtham.r
52d1d93d00 Changed serial port address in ARM platform, chenged the spritnf call to snprintf call for safty reason. fixed other warnings.
Signed-off-by: gowtham.r <gowtham.r@adlinktech.com>
2020-09-15 10:36:11 -07:00
Chuckduey
c10e72b494 Added V1.2 for Pi 4 2GB and 4GB
Signed-off-by: Chuckduey <cduey@msn.com>
2020-05-07 13:36:03 -07:00
Chuck Duey
f58cdc9da4 Added Raspberry Pi 4 1GB 2GB and 4GB to the list of detected platforms
Signed-off-by: Chuck Duey <cduey@msn.com>
2020-01-10 09:33:19 -08:00
kathaashok
bb736e762b fixing indentation issues reported by eclipse mraa
Signed-off-by: kathaashok <katha.ashok@adlinktech.com>
2020-01-10 07:33:18 -08:00
katha ashok
ef8c0fb541 Fixing minor issues. supporting LEC-AL-AI board
Signed-off-by: katha ashok <katha.ashok@adlinktech.com>
2020-01-10 07:33:18 -08:00
Brian Lee
63de2c4c3a rockpi4.c: fixed pwm issue
e.g.:
    cv2 import at the beginning throws the error:
    import cv2
    import mraa
    import time
    ...

    Error:
    ValueError: Error initialising PWM on pin

Signed-off-by: Brian Lee <brian@vamrs.com>
2020-01-09 10:11:58 -08:00
Michael Campion
1d18da9a22 upxtreme: add spdx tags to source files
Remove MIT notice and replace with SPDX tags in UP Xtreme sources.

Signed-off-by: Michael Campion <michael.campion@emutex.com>
2020-01-06 15:17:55 +00:00
Michael Campion
d954599045 upxtreme: Add UP Xtreme support
UP Xtreme is based on the Intel(R) Core(TM) i3/i5/i7 Whiskey Lake SoCs.
The UP Xtreme presents one Raspberry Pi compatible HAT connector.

This implementaion supports i2c, spi, uart, adc and gpio through the
40pin HAT connector.

Gpio chardev capabilities have been disabled in this implementation. When
gpio chardev capabilities are enabled an input becomes unreadable after an
isr has been registered to the pin. See here for details:

https://github.com/intel-iot-devkit/mraa/issues/937

Tested on UP Xtreme, with UP Board Linux kernel 5.0.0
Features tested: gpio, gpio interrupts, i2c, spi, adc and uart.

Signed-off-by: Michael Campion <michael.campion@emutex.com>
2020-01-06 15:17:55 +00:00
Carsten Menke
79043568dd made Rock Pi 4 working again with recent 5.x kernels
Signed-off-by: Carsten Menke <cm@p-i-u.de>
2019-12-29 20:14:42 +00:00
gowtham.r
4ba5da1144 adding Adlink IPi SMARC x86/ARM support
Signed-off-by: gowtham.r <gowtham.r@adlinktech.com>
2019-12-03 07:52:58 -08:00
Benxi Liu
3b2f80b6e2 uart: fix xonxoff value in mraa_uart_settings()
the value of xonxoff(IXON|IXOFF) resides in the c_iflag field in
struct termios, not c_cflag.

Signed-off-by: Benxi Liu <bxliu@linux.alibaba.com>
2019-12-03 07:52:58 -08:00
Thomas Ingleby
c1eeb8ab87 eclipse: change Java namespace
io.mraa -> org.eclipse.mraa

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2019-11-13 13:14:20 -08:00
Thomas Ingleby
170bdd104f spdx: add spdx tags to most files
Large change that removes the duplicated MIT notice withe a spdx tag

Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2019-05-23 10:09:12 -07:00
Manivannan Sadhasivam
0a12c5a017 gpio: Introduce mraa_gpio_init_by_name API
This commit introduces mraa_gpio_init_by_name API for initializing
a GPIO by its line name provided by the kernel. This feature depends
on the GPIO chardev support and also the line names present in devicetree
or board files. Accessing GPIO using its line name, removes the dependency
from MRAA specific pin mapping and provides a cleaner way to access GPIOs.
This will solve the issue created by an external gpiochip probing before
the SoC's internal gpio controller and thereby making the MRAA pin mapping
wrong.

Currently, this API only supports initializing a single GPIO at a time.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-05-10 16:29:13 +05:30
Manivannan Sadhasivam
111e6be8f7 96boards: Add chardev support to Rock960
Add chardev support to Rock960 96Boards.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2019-05-10 16:24:41 +05:30
Brian Lee
b8349c0ffe rockpi4: Add rockpi4 support
Closes #958

Signed-off-by: Brian Lee <brian@vamrs.com>
Signed-off-by: Thomas Ingleby <thomas.ingleby@intel.com>
2019-03-28 13:09:46 -07:00
Mihai Tudor Panu
8942117b2e x86.c: add missing platform init call when MRAAPLATFORMFORCE is set to IEI Tank
Signed-off-by: Mihai Tudor Panu <mihai.tudor.panu@intel.com>
2019-03-26 22:17:25 -07:00